dd7fa81b20
This commit goes through the `runtests` folder of the `filetests` test suite and ensure that everything which uses simd or float-related instructions on x64 is executed with the baseline support for x86_64 in addition to adding in AVX support. Most of the instructions used have AVX equivalents so this should help test all of the equivalents in addition to the codegen filetests in the x64 folder.
62 lines
1.4 KiB
Plaintext
62 lines
1.4 KiB
Plaintext
test run
|
|
target aarch64
|
|
target s390x
|
|
set enable_simd
|
|
target x86_64 has_sse3 has_ssse3 has_sse41
|
|
target x86_64 has_sse3 has_ssse3 has_sse41 has_avx
|
|
|
|
|
|
function %fcmp_eq_f32x4() -> i8 {
|
|
block0:
|
|
v0 = vconst.f32x4 [0.0 -0x4.2 0x0.33333 -0.0]
|
|
v1 = vconst.f32x4 [0.0 -0x4.2 0x0.33333 -0.0]
|
|
v2 = fcmp eq v0, v1
|
|
v8 = vall_true v2
|
|
return v8
|
|
}
|
|
; run: %fcmp_eq_f32x4() == 1
|
|
|
|
function %fcmp_lt_f32x4() -> i8 {
|
|
block0:
|
|
v0 = vconst.f32x4 [0.0 -0x4.2 0x0.0 -0.0]
|
|
v1 = vconst.f32x4 [0x0.001 0x4.2 0x0.33333 0x1.0]
|
|
v2 = fcmp lt v0, v1
|
|
v8 = vall_true v2
|
|
return v8
|
|
}
|
|
; run: %fcmp_lt_f32x4() == 1
|
|
|
|
function %fcmp_ge_f64x2() -> i8 {
|
|
block0:
|
|
v0 = vconst.f64x2 [0x0.0 0x4.2]
|
|
v1 = vconst.f64x2 [0.0 0x4.1]
|
|
v2 = fcmp ge v0, v1
|
|
v8 = vall_true v2
|
|
return v8
|
|
}
|
|
; run: %fcmp_ge_f64x2() == 1
|
|
|
|
function %fcmp_uno_f64x2() -> i8 {
|
|
block0:
|
|
v0 = vconst.f64x2 [0.0 NaN]
|
|
v1 = vconst.f64x2 [NaN 0x4.1]
|
|
v2 = fcmp uno v0, v1
|
|
v8 = vall_true v2
|
|
return v8
|
|
}
|
|
; run: %fcmp_uno_f64x2() == 1
|
|
|
|
function %fcmp_gt_nans_f32x4() -> i8 {
|
|
block0:
|
|
v0 = vconst.f32x4 [NaN 0x42.0 -NaN NaN]
|
|
v1 = vconst.f32x4 [NaN NaN 0x42.0 Inf]
|
|
v2 = fcmp gt v0, v1
|
|
; now check that the result v2 is all zeroes
|
|
v3 = vconst.i32x4 0x00
|
|
v4 = bitcast.i32x4 v2
|
|
v5 = icmp eq v3, v4
|
|
v8 = vall_true v5
|
|
return v8
|
|
}
|
|
; run: %fcmp_gt_nans_f32x4() == 1
|