Jakob Stoklund Olesen 9629867d0c Encodings for load/store instructions. ...

We don't support the full set of Intel addressing modes yet. So far we
have:

- Register indirect, no displacement.
- Register indirect, 8-bit signed displacement.
- Register indirect, 32-bit signed displacement.

The SIB addressing modes will need new Cretonne instruction formats to
represent.

2017-05-12 16:49:39 -07:00

..

binary32.cton

Encodings for load/store instructions.

2017-05-12 16:49:39 -07:00