8c5a69eb47
The List and Dict types are no longer implicitly available. They must be imported from typing. Type annotations must appear before the doc comment in a function. Also fix type errors in these functions that weren't detected before.
246 lines
8.6 KiB
Python
246 lines
8.6 KiB
Python
"""Defining instruction set architectures."""
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from __future__ import absolute_import
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from .predicates import And
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from .registers import RegClass, Register
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# The typing module is only required by mypy, and we don't use these imports
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# outside type comments.
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try:
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from typing import Tuple, Union, Any, Iterable, Sequence, List, Set, TYPE_CHECKING # noqa
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from .instructions import MaybeBoundInst, InstructionGroup, InstructionFormat # noqa
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from .predicates import Predicate, FieldPredicate # noqa
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from .settings import SettingGroup # noqa
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from .types import ValueType # noqa
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from .registers import RegBank # noqa
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AnyPredicate = Union[Predicate, FieldPredicate]
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OperandConstraint = Union[RegClass, Register, int]
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ConstraintSeq = Union[OperandConstraint, Tuple[OperandConstraint, ...]]
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except ImportError:
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pass
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class TargetISA(object):
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"""
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A target instruction set architecture.
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The `TargetISA` class collects everything known about a target ISA.
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:param name: Short mnemonic name for the ISA.
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:param instruction_groups: List of `InstructionGroup` instances that are
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relevant for this ISA.
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"""
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def __init__(self, name, instruction_groups):
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# type: (str, Sequence[InstructionGroup]) -> None
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self.name = name
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self.settings = None # type: SettingGroup
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self.instruction_groups = instruction_groups
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self.cpumodes = list() # type: List[CPUMode]
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self.regbanks = list() # type: List[RegBank]
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def finish(self):
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# type: () -> TargetISA
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"""
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Finish the definition of a target ISA after adding all CPU modes and
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settings.
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This computes some derived properties that are used in multilple
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places.
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:returns self:
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"""
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self._collect_encoding_recipes()
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self._collect_predicates()
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self._collect_regclasses()
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return self
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def _collect_encoding_recipes(self):
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# type: () -> None
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"""
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Collect and number all encoding recipes in use.
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"""
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self.all_recipes = list() # type: List[EncRecipe]
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rcps = set() # type: Set[EncRecipe]
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for cpumode in self.cpumodes:
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for enc in cpumode.encodings:
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recipe = enc.recipe
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if recipe not in rcps:
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recipe.number = len(rcps)
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rcps.add(recipe)
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self.all_recipes.append(recipe)
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def _collect_predicates(self):
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# type: () -> None
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"""
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Collect and number all predicates in use.
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Sets `instp.number` for all used instruction predicates and places them
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in `self.all_instps` in numerical order.
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Ensures that all ISA predicates have an assigned bit number in
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`self.settings`.
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"""
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self.all_instps = list() # type: List[AnyPredicate]
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instps = set() # type: Set[AnyPredicate]
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for cpumode in self.cpumodes:
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for enc in cpumode.encodings:
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instp = enc.instp
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if instp and instp not in instps:
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# assign predicate number starting from 0.
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instp.number = len(instps)
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instps.add(instp)
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self.all_instps.append(instp)
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# All referenced ISA predicates must have a number in
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# `self.settings`. This may cause some parent predicates to be
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# replicated here, which is OK.
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if enc.isap:
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self.settings.number_predicate(enc.isap)
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def _collect_regclasses(self):
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"""
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Collect and number register classes.
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Every register class needs a unique index, and the classes need to be
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topologically ordered.
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"""
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rc_index = 0
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for bank in self.regbanks:
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bank.finish_regclasses(rc_index)
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rc_index += len(bank.classes)
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class CPUMode(object):
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"""
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A CPU mode determines which instruction encodings are active.
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All instruction encodings are associated with exactly one `CPUMode`, and
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all CPU modes are associated with exactly one `TargetISA`.
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:param name: Short mnemonic name for the CPU mode.
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:param target: Associated `TargetISA`.
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"""
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def __init__(self, name, isa):
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# type: (str, TargetISA) -> None
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self.name = name
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self.isa = isa
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self.encodings = [] # type: List[Encoding]
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isa.cpumodes.append(self)
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def __str__(self):
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# type: () -> str
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return self.name
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def enc(self, *args, **kwargs):
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"""
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Add a new encoding to this CPU mode.
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Arguments are the `Encoding constructor arguments, except for the first
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`CPUMode argument which is implied.
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"""
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self.encodings.append(Encoding(self, *args, **kwargs))
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class EncRecipe(object):
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"""
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A recipe for encoding instructions with a given format.
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Many different instructions can be encoded by the same recipe, but they
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must all have the same instruction format.
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The `ins` and `outs` arguments are tuples specifying the register
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allocation constraints for the value operands and results respectively. The
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possible constraints for an operand are:
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- A `RegClass` specifying the set of allowed registers.
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- A `Register` specifying a fixed-register operand.
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- An integer indicating that this result is tied to a value operand, so
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they must use the same register.
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:param name: Short mnemonic name for this recipe.
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:param format: All encoded instructions must have this
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:py:class:`InstructionFormat`.
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:param: ins Tuple of register constraints for value operands.
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:param: outs Tuple of register constraints for results.
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"""
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def __init__(self, name, format, ins, outs, instp=None, isap=None):
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# type: (str, InstructionFormat, ConstraintSeq, ConstraintSeq, AnyPredicate, AnyPredicate) -> None # noqa
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self.name = name
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self.format = format
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self.instp = instp
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self.isap = isap
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if instp:
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assert instp.predicate_context() == format
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self.number = None # type: int
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self.ins = self._verify_constraints(ins)
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assert len(self.ins) == len(format.value_operands)
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self.outs = self._verify_constraints(outs)
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if len(self.outs) > 1:
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assert format.multiple_results
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def __str__(self):
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# type: () -> str
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return self.name
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def _verify_constraints(self, seq):
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# (ConstraintSeq) -> Sequence[OperandConstraint]
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if not isinstance(seq, tuple):
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seq = (seq,)
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for c in seq:
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if isinstance(c, int):
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# An integer constraint is bound to a value operand.
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# Check that it is in range.
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assert c >= 0 and c < len(self.format.value_operands)
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else:
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assert isinstance(c, RegClass) or isinstance(c, Register)
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return seq
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class Encoding(object):
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"""
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Encoding for a concrete instruction.
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An `Encoding` object ties an instruction opcode with concrete type
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variables together with and encoding recipe and encoding bits.
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:param cpumode: The CPU mode where the encoding is active.
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:param inst: The :py:class:`Instruction` or :py:class:`BoundInstruction`
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being encoded.
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:param recipe: The :py:class:`EncRecipe` to use.
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:param encbits: Additional encoding bits to be interpreted by `recipe`.
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:param instp: Instruction predicate, or `None`.
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:param isap: ISA predicate, or `None`.
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"""
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def __init__(self, cpumode, inst, recipe, encbits, instp=None, isap=None):
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# type: (CPUMode, MaybeBoundInst, EncRecipe, int, AnyPredicate, AnyPredicate) -> None # noqa
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assert isinstance(cpumode, CPUMode)
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assert isinstance(recipe, EncRecipe)
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self.inst, self.typevars = inst.fully_bound()
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self.cpumode = cpumode
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assert self.inst.format == recipe.format, (
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"Format {} must match recipe: {}".format(
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self.inst.format, recipe.format))
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self.recipe = recipe
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self.encbits = encbits
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# Combine recipe predicates with the manually specified ones.
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self.instp = And.combine(recipe.instp, instp)
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self.isap = And.combine(recipe.isap, isap)
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def __str__(self):
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# type: () -> str
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return '[{}#{:02x}]'.format(self.recipe, self.encbits)
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def ctrl_typevar(self):
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# type: () -> ValueType
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"""
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Get the controlling type variable for this encoding or `None`.
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"""
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if self.typevars:
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return self.typevars[0]
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else:
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return None
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