cdecc858b4
Add a RISC-V 64 (`riscv64`, RV64GC) backend. Co-authored-by: yuyang <756445638@qq.com> Co-authored-by: Chris Fallin <chris@cfallin.org> Co-authored-by: Afonso Bordado <afonsobordado@az8.co>
43 lines
827 B
Plaintext
43 lines
827 B
Plaintext
test interpret
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test run
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target aarch64
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target s390x
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target x86_64
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target riscv64
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function %bitrev_i8(i8) -> i8 {
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block0(v0: i8):
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v1 = bitrev v0
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return v1
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}
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; run: %bitrev_i8(1) == -128
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; run: %bitrev_i8(64) == 2
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; run: %bitrev_i8(-1) == -1
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function %bitrev_i16(i16) -> i16 {
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block0(v0: i16):
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v1 = bitrev v0
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return v1
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}
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; run: %bitrev_i16(1) == -32768
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; run: %bitrev_i16(16384) == 2
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; run: %bitrev_i16(-1) == -1
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function %bitrev_i32(i32) -> i32 {
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block0(v0: i32):
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v1 = bitrev v0
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return v1
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}
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; run: %bitrev_i32(1) == -2147483648
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; run: %bitrev_i32(1073741824) == 2
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; run: %bitrev_i32(-1) == -1
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function %bitrev_i64(i64) -> i64 {
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block0(v0: i64):
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v1 = bitrev v0
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return v1
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}
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; run: %bitrev_i64(1) == -9223372036854775808
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; run: %bitrev_i64(4611686018427387904) == 2
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; run: %bitrev_i64(-1) == -1
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