15 lines
334 B
Python
15 lines
334 B
Python
"""
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RISC-V definitions.
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Commonly used definitions.
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"""
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from __future__ import absolute_import
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from cdsl.isa import TargetISA, CPUMode
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import base.instructions
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ISA = TargetISA('riscv', [base.instructions.GROUP]) # type: TargetISA
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# CPU modes for 32-bit and 64-bit operation.
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RV32 = CPUMode('RV32', ISA)
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RV64 = CPUMode('RV64', ISA)
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