Jakob Stoklund Olesen 3a47b40ff8 Add RISC-V encodings for brz and brnz. ...

These branches compare a register to zero. RISC-V implements this with
the %x0 hard-coded zero register.

2017-04-03 15:20:57 -07:00

..

abi.cton

Break out differently purposed tests from abi.cton.

2017-03-17 10:07:32 -07:00

binary32.cton

Add RISC-V encodings for brz and brnz.

2017-04-03 15:20:57 -07:00

encoding.cton

Add return_reg encodings for RISC-V.

2017-02-21 16:29:23 -08:00

expand-i32.cton

Add expansion patterns for large immediates.

2016-11-10 15:55:54 -08:00

legalize-abi.cton

Fix a type error in the legalizer patterns.

2017-03-29 15:00:27 -07:00

legalize-i64.cton

Fix a type error in the legalizer patterns.

2017-03-29 15:00:27 -07:00

parse-encoding.cton

Break out differently purposed tests from abi.cton.

2017-03-17 10:07:32 -07:00

split-args.cton

Simplify branch arguments after splitting EBB arguments.

2017-03-22 15:29:06 -07:00