83d3a1020d
Translate the small integer arguments to i32 or i64 with the appropriate extend and ireduce instructions.
96 lines
3.0 KiB
Rust
96 lines
3.0 KiB
Rust
//! RISC-V ABI implementation.
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//!
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//! This module implements the RISC-V calling convention through the primary `legalize_signature()`
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//! entry point.
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//!
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//! This doesn't support the soft-float ABI at the moment.
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use abi::{ArgAction, ValueConversion, ArgAssigner, legalize_args};
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use ir::{Signature, Type, ArgumentType, ArgumentLoc, ArgumentExtension};
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use isa::riscv::registers::{GPR, FPR};
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use settings as shared_settings;
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struct Args {
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pointer_bits: u16,
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pointer_bytes: u32,
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pointer_type: Type,
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regs: u32,
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offset: u32,
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}
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impl Args {
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fn new(bits: u16) -> Args {
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Args {
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pointer_bits: bits,
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pointer_bytes: bits as u32 / 8,
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pointer_type: Type::int(bits).unwrap(),
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regs: 0,
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offset: 0,
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}
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}
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}
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impl ArgAssigner for Args {
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fn assign(&mut self, arg: &ArgumentType) -> ArgAction {
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fn align(value: u32, to: u32) -> u32 {
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(value + to - 1) & !(to - 1)
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}
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let ty = arg.value_type;
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// Check for a legal type.
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// RISC-V doesn't have SIMD at all, so break all vectors down.
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if !ty.is_scalar() {
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return ArgAction::Convert(ValueConversion::VectorSplit);
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}
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// Large integers and booleans are broken down to fit in a register.
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if !ty.is_float() && ty.bits() > self.pointer_bits {
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// Align registers and stack to a multiple of two pointers.
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self.regs = align(self.regs, 2);
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self.offset = align(self.offset, 2 * self.pointer_bytes);
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return ArgAction::Convert(ValueConversion::IntSplit);
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}
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// Small integers are extended to the size of a pointer register.
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if ty.is_int() && ty.bits() < self.pointer_bits {
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match arg.extension {
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ArgumentExtension::None => {}
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ArgumentExtension::Uext => {
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return ArgAction::Convert(ValueConversion::Uext(self.pointer_type))
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}
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ArgumentExtension::Sext => {
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return ArgAction::Convert(ValueConversion::Sext(self.pointer_type))
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}
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}
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}
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if self.regs < 8 {
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// Assign to a register.
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let reg = if ty.is_float() {
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FPR.unit(10 + self.regs as usize)
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} else {
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GPR.unit(10 + self.regs as usize)
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};
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self.regs += 1;
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ArgAction::Assign(ArgumentLoc::Reg(reg))
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} else {
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// Assign a stack location.
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let loc = ArgumentLoc::Stack(self.offset);
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self.offset += self.pointer_bytes;
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ArgAction::Assign(loc)
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}
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}
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}
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/// Legalize `sig` for RISC-V.
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pub fn legalize_signature(sig: &mut Signature, flags: &shared_settings::Flags) {
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let bits = if flags.is_64bit() { 64 } else { 32 };
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let mut args = Args::new(bits);
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legalize_args(&mut sig.argument_types, &mut args);
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let mut rets = Args::new(bits);
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legalize_args(&mut sig.return_types, &mut rets);
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}
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