7b98be1bee
* Cranelift AArch64: Simplify leaf functions that do not use the stack Leaf functions that do not use the stack (e.g. do not clobber any callee-saved registers) do not need a frame record. Copyright (c) 2021, Arm Limited.
148 lines
2.6 KiB
Plaintext
148 lines
2.6 KiB
Plaintext
test compile
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set unwind_info=false
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target aarch64
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function %fn1(i8x16, i8x16) -> i16x8 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swiden_low v0
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v3 = swiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull v0.8h, v0.8b, v1.8b
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; nextln: ret
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function %fn2(i8x16, i8x16) -> i16x8 {
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block0(v0: i8x16, v1: i8x16):
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v2 = swiden_high v0
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v3 = swiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull2 v0.8h, v0.16b, v1.16b
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; nextln: ret
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function %fn3(i16x8, i16x8) -> i32x4 {
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block0(v0: i16x8, v1: i16x8):
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v2 = swiden_low v0
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v3 = swiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull v0.4s, v0.4h, v1.4h
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; nextln: ret
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function %fn4(i16x8, i16x8) -> i32x4 {
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block0(v0: i16x8, v1: i16x8):
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v2 = swiden_high v0
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v3 = swiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull2 v0.4s, v0.8h, v1.8h
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; nextln: ret
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function %fn5(i32x4, i32x4) -> i64x2 {
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block0(v0: i32x4, v1: i32x4):
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v2 = swiden_low v0
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v3 = swiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull v0.2d, v0.2s, v1.2s
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; nextln: ret
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function %fn6(i32x4, i32x4) -> i64x2 {
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block0(v0: i32x4, v1: i32x4):
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v2 = swiden_high v0
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v3 = swiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: sxtl
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; check: smull2 v0.2d, v0.4s, v1.4s
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; nextln: ret
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function %fn7(i8x16, i8x16) -> i16x8 {
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block0(v0: i8x16, v1: i8x16):
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v2 = uwiden_low v0
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v3 = uwiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl
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; check: umull v0.8h, v0.8b, v1.8b
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; nextln: ret
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function %fn8(i8x16, i8x16) -> i16x8 {
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block0(v0: i8x16, v1: i8x16):
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v2 = uwiden_high v0
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v3 = uwiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl
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; check: umull2 v0.8h, v0.16b, v1.16b
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; nextln: ret
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function %fn9(i16x8, i16x8) -> i32x4 {
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block0(v0: i16x8, v1: i16x8):
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v2 = uwiden_low v0
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v3 = uwiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl
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; check: umull v0.4s, v0.4h, v1.4h
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; nextln: ret
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function %fn10(i16x8, i16x8) -> i32x4 {
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block0(v0: i16x8, v1: i16x8):
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v2 = uwiden_high v0
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v3 = uwiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl
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; check: umull2 v0.4s, v0.8h, v1.8h
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; nextln: ret
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function %fn11(i32x4, i32x4) -> i64x2 {
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block0(v0: i32x4, v1: i32x4):
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v2 = uwiden_low v0
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v3 = uwiden_low v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl
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; check: umull v0.2d, v0.2s, v1.2s
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; nextln: ret
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function %fn12(i32x4, i32x4) -> i64x2 {
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block0(v0: i32x4, v1: i32x4):
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v2 = uwiden_high v0
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v3 = uwiden_high v1
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v4 = imul v2, v3
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return v4
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}
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; check-not: uxtl2
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; check: umull2 v0.2d, v0.4s, v1.4s
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; nextln: ret
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