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wasmtime/cranelift/filetests/filetests/isa/aarch64/condbr.clif
Trevor Elliott b077854b57 Generate SSA code from returns (#5172)
Modify return pseudo-instructions to have pairs of registers: virtual and real. This allows us to constrain the virtual registers to the real ones specified by the abi, instead of directly emitting moves to those real registers.
2022-11-08 16:00:49 -08:00

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6.9 KiB
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test compile precise-output
set unwind_info=false
target aarch64
function %f(i64, i64) -> i8 {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
return v2
}
; block0:
; subs xzr, x0, x1
; cset x0, eq
; ret
function %icmp_eq_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp eq v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; ccmp x1, x3, #nzcv, eq
; cset x0, eq
; ret
function %icmp_ne_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp ne v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; ccmp x1, x3, #nzcv, eq
; cset x0, ne
; ret
function %icmp_slt_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp slt v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, lo
; subs xzr, x1, x3
; cset x9, lt
; csel x0, x6, x9, eq
; ret
function %icmp_ult_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp ult v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, lo
; subs xzr, x1, x3
; cset x9, lo
; csel x0, x6, x9, eq
; ret
function %icmp_sle_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp sle v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, ls
; subs xzr, x1, x3
; cset x9, le
; csel x0, x6, x9, eq
; ret
function %icmp_ule_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp ule v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, ls
; subs xzr, x1, x3
; cset x9, ls
; csel x0, x6, x9, eq
; ret
function %icmp_sgt_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp sgt v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, hi
; subs xzr, x1, x3
; cset x9, gt
; csel x0, x6, x9, eq
; ret
function %icmp_ugt_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp ugt v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, hi
; subs xzr, x1, x3
; cset x9, hi
; csel x0, x6, x9, eq
; ret
function %icmp_sge_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp sge v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, hs
; subs xzr, x1, x3
; cset x9, ge
; csel x0, x6, x9, eq
; ret
function %icmp_uge_i128(i128, i128) -> i8 {
block0(v0: i128, v1: i128):
v2 = icmp uge v0, v1
return v2
}
; block0:
; subs xzr, x0, x2
; cset x6, hs
; subs xzr, x1, x3
; cset x9, hs
; csel x0, x6, x9, eq
; ret
function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
brnz v2, block1
jump block2
block1:
v4 = iconst.i64 1
return v4
block2:
v5 = iconst.i64 2
return v5
}
; block0:
; subs xzr, x0, x1
; b.eq label1 ; b label2
; block1:
; movz x0, #1
; ret
; block2:
; movz x0, #2
; ret
function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):
v2 = icmp eq v0, v1
brnz v2, block1
jump block1
block1:
v4 = iconst.i64 1
return v4
}
; block0:
; subs xzr, x0, x1
; b.eq label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; movz x0, #1
; ret
function %i128_brz(i128){
block0(v0: i128):
brz v0, block1
jump block1
block1:
nop
return
}
; block0:
; orr x3, x0, x1
; cbz x3, label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_brnz(i128){
block0(v0: i128):
brnz v0, block1
jump block1
block1:
nop
return
}
; block0:
; orr x3, x0, x1
; cbnz x3, label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_eq(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp eq v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; ccmp x1, x3, #nzcv, eq
; b.eq label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_ne(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp ne v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; ccmp x1, x3, #nzcv, eq
; b.ne label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_slt(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp slt v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, lo
; subs xzr, x1, x3
; cset x9, lt
; csel x11, x6, x9, eq
; subs xzr, xzr, x11
; b.lt label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_ult(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp ult v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, lo
; subs xzr, x1, x3
; cset x9, lo
; csel x11, x6, x9, eq
; subs xzr, xzr, x11
; b.lo label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_sle(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp sle v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, ls
; subs xzr, x1, x3
; cset x9, le
; csel x11, x6, x9, eq
; movz w13, #1
; subs xzr, x13, x11
; b.le label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_ule(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp ule v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, ls
; subs xzr, x1, x3
; cset x9, ls
; csel x11, x6, x9, eq
; orr x13, xzr, #1
; subs xzr, x13, x11
; b.ls label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_sgt(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp sgt v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, hi
; subs xzr, x1, x3
; cset x9, gt
; csel x11, x6, x9, eq
; subs xzr, x11, xzr
; b.gt label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_ugt(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp ugt v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, hi
; subs xzr, x1, x3
; cset x9, hi
; csel x11, x6, x9, eq
; subs xzr, x11, xzr
; b.hi label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_sge(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp sge v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, hs
; subs xzr, x1, x3
; cset x9, ge
; csel x11, x6, x9, eq
; movz w13, #1
; subs xzr, x11, x13
; b.ge label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret
function %i128_bricmp_uge(i128, i128) {
block0(v0: i128, v1: i128):
v2 = icmp uge v0, v1
brnz v2, block1
jump block1
block1:
return
}
; block0:
; subs xzr, x0, x2
; cset x6, hs
; subs xzr, x1, x3
; cset x9, hs
; csel x11, x6, x9, eq
; orr x13, xzr, #1
; subs xzr, x11, x13
; b.hs label1 ; b label2
; block1:
; b label3
; block2:
; b label3
; block3:
; ret