a1b39276e1
The tests for the SIMD floating-point maximum and minimum operations require particular care because the handling of the NaN values is non-deterministic and may vary between platforms. There is no way to match several NaN values in a test, so the solution is to extract the non-deterministic test cases into a separate file that is subsequently replicated for every backend under test, with adjustments made to the expected results. Copyright (c) 2021, Arm Limited.
57 lines
1.5 KiB
Plaintext
57 lines
1.5 KiB
Plaintext
test licm
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target aarch64
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target x86_64
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;; Nontrapping possibly-not-readonly load from address that is not
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;; loop-dependent should *not* be hoisted out of loop, though the
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;; address computation can be.
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function %hoist_load(i32, i64 vmctx) -> i32 {
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gv0 = vmctx
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gv1 = load.i64 notrap aligned readonly gv0
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heap0 = static gv1, min 0x1_0000, bound 0x1_0000_0000, offset_guard 0x8000_0000, index_type i32
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block0(v0: i32, v1: i64):
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v4 = iconst.i32 1
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v5 = heap_addr.i64 heap0, v4, 1
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jump block1(v0, v1)
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block1(v2: i32, v3: i64):
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v6 = load.i32 notrap aligned v5
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v7 = iadd v2, v6
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brz v2, block3(v2)
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jump block2
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block2:
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v8 = isub v2, v4
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jump block1(v8, v3)
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block3(v9: i32):
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return v9
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}
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; sameln: function %hoist_load(i32, i64 vmctx) -> i32 fast {
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; nextln: gv0 = vmctx
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; nextln: gv1 = load.i64 notrap aligned readonly gv0
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; nextln: heap0 = static gv1, min 0x0001_0000, bound 0x0001_0000_0000, offset_guard 0x8000_0000, index_type i32
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; nextln:
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; nextln: block0(v0: i32, v1: i64):
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; nextln: v4 = iconst.i32 1
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; nextln: v5 = heap_addr.i64 heap0, v4, 1
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; nextln: jump block1(v0, v1)
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; nextln:
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; nextln: block1(v2: i32, v3: i64):
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; nextln: v6 = load.i32 notrap aligned v5
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; nextln: v7 = iadd v2, v6
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; nextln: brz v2, block3(v2)
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; nextln: jump block2
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; nextln:
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; nextln: block2:
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; nextln: v8 = isub.i32 v2, v4
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; nextln: jump block1(v8, v3)
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; nextln:
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; nextln: block3(v9: i32):
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; nextln: return v9
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; nextln: }
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