48cf2c2f50
- Undo temporary changes to default features (`all-arch`) and a
signal-handler test.
- Remove `SIGTRAP` handler: no longer needed now that we've found an
"undefined opcode" option on ARM64.
- Rename pp.rs to pretty_print.rs in machinst/.
- Only use empty stack-probe on non-x86. As per a comment in
rust-lang/compiler-builtins [1], LLVM only supports stack probes on
x86 and x86-64. Thus, on any other CPU architecture, we cannot refer
to `__rust_probestack`, because it does not exist.
- Rename arm64 to aarch64.
- Use `target` directive in vcode filetests.
- Run the flags verifier, but without encinfo, when using new backends.
- Clean up warning overrides.
- Fix up use of casts: use u32::from(x) and siblings when possible,
u32::try_from(x).unwrap() when not, to avoid silent truncation.
- Take immutable `Function` borrows as input; we don't actually
mutate the input IR.
- Lots of other miscellaneous cleanups.
[1] cae3e6ea23/src/probestack.rs (L39)
159 lines
2.7 KiB
Plaintext
159 lines
2.7 KiB
Plaintext
test vcode
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target aarch64
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function %f_u_8_64(i8) -> i64 {
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block0(v0: i8):
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v1 = uextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: uxtb x0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_u_8_32(i8) -> i32 {
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block0(v0: i8):
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v1 = uextend.i32 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: uxtb w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_u_8_16(i8) -> i16 {
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block0(v0: i8):
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v1 = uextend.i16 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: uxtb w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_8_64(i8) -> i64 {
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block0(v0: i8):
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v1 = sextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxtb x0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_8_32(i8) -> i32 {
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block0(v0: i8):
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v1 = sextend.i32 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxtb w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_8_16(i8) -> i16 {
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block0(v0: i8):
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v1 = sextend.i16 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxtb w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_u_16_64(i16) -> i64 {
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block0(v0: i16):
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v1 = uextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: uxth x0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_u_16_32(i16) -> i32 {
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block0(v0: i16):
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v1 = uextend.i32 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: uxth w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_16_64(i16) -> i64 {
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block0(v0: i16):
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v1 = sextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxth x0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_16_32(i16) -> i32 {
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block0(v0: i16):
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v1 = sextend.i32 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxth w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_u_32_64(i32) -> i64 {
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block0(v0: i32):
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v1 = uextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: mov w0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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function %f_s_32_64(i32) -> i64 {
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block0(v0: i32):
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v1 = sextend.i64 v0
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return v1
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}
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: sxtw x0, w0
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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; nextln: ret
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