641771ac6a
When LICM generates a preheader, it needs to add encodings to the instructions it generates, since it runs after legalization.
57 lines
1.1 KiB
Plaintext
57 lines
1.1 KiB
Plaintext
test licm
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target riscv32
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function %nested_loops(i32) -> i32 {
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ebb0(v0: i32):
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jump ebb1(v0)
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ebb1(v1: i32):
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v2 = iconst.i32 1
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v3 = iconst.i32 2
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v4 = iadd v2, v3
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v5 = isub v1, v2
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jump ebb2(v5, v5)
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ebb2(v10: i32, v11: i32):
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brz v11, ebb3(v10)
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v12 = iconst.i32 1
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v15 = iadd v12, v5
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v13 = isub v11, v12
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jump ebb2(v10,v13)
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ebb3(v20: i32):
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brz v20, ebb4(v20)
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jump ebb1(v20)
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ebb4(v30: i32):
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return v30
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}
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; sameln:function %nested_loops(i32) -> i32 {
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; nextln: ebb0(v0: i32):
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; nextln: v2 = iconst.i32 1
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; nextln: v3 = iconst.i32 2
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; nextln: v4 = iadd v2, v3
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; nextln: v12 = iconst.i32 1
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; nextln: jump ebb1(v0)
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; nextln:
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; nextln: ebb1(v1: i32):
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; nextln: v5 = isub v1, v2
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; nextln: v15 = iadd.i32 v12, v5
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; nextln: jump ebb2(v5, v5)
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; nextln:
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; nextln: ebb2(v10: i32, v11: i32):
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; nextln: brz v11, ebb3(v10)
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; nextln: v13 = isub v11, v12
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; nextln: jump ebb2(v10, v13)
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; nextln:
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; nextln: ebb3(v20: i32):
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; nextln: brz v20, ebb4(v20)
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; nextln: jump ebb1(v20)
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; nextln:
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; nextln: ebb4(v30: i32):
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; nextln: return v30
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; nextln: }
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