07136ae96d
* cranelift: Add function name to tests * cranelift: Move simd-ineg tests to separate file * cranelift: Move `avg_round` tests to separate file * cranelift: Move SIMD `fmin`/`fmax` tests to separate files * cranelift-interpreter: Implement a bunch of SIMD arithmetic ops Most of these are quite easy to adapt to be polymorphic * cranelift: Move shift tests from `simd-arithmetic.clif` into shift files
83 lines
2.5 KiB
Plaintext
83 lines
2.5 KiB
Plaintext
test run
|
|
set enable_simd
|
|
target aarch64
|
|
target s390x
|
|
target x86_64 skylake
|
|
|
|
|
|
function %ishl_i8x16(i8x16, i32) -> i8x16 {
|
|
block0(v0: i8x16, v1: i32):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %ishl_i8x16([0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15], 4) == [0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xa0 0xb0 0xc0 0xd0 0xe0 0xf0]
|
|
; run: %ishl_i8x16([0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15], 12) == [0x00 0x10 0x20 0x30 0x40 0x50 0x60 0x70 0x80 0x90 0xa0 0xb0 0xc0 0xd0 0xe0 0xf0]
|
|
|
|
function %ishl_i16x8(i16x8, i32) -> i16x8 {
|
|
block0(v0: i16x8, v1: i32):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %ishl_i16x8([1 2 4 8 16 32 64 128], 1) == [2 4 8 16 32 64 128 256]
|
|
; run: %ishl_i16x8([1 2 4 8 16 32 64 128], 17) == [2 4 8 16 32 64 128 256]
|
|
|
|
function %ishl_i32x4(i32x4, i32) -> i32x4 {
|
|
block0(v0: i32x4, v1: i32):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %ishl_i32x4([1 2 4 8], 1) == [2 4 8 16]
|
|
; run: %ishl_i32x4([1 2 4 8], 33) == [2 4 8 16]
|
|
|
|
function %ishl_i64x2(i64x2, i32) -> i64x2 {
|
|
block0(v0: i64x2, v1: i32):
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %ishl_i64x2([1 2], 1) == [2 4]
|
|
; run: %ishl_i64x2([1 2], 65) == [2 4]
|
|
|
|
|
|
function %ishl_imm_i64x2(i64x2) -> i64x2 {
|
|
block0(v0: i64x2):
|
|
v2 = ishl_imm v0, 1
|
|
return v2
|
|
}
|
|
; run: %ishl_imm_i64x2([1 0]) == [2 0]
|
|
|
|
|
|
function %i8x16_shl_const(i8x16) -> i8x16 {
|
|
block0(v0: i8x16):
|
|
v1 = iconst.i32 2
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %i8x16_shl_const([0x01 0x02 0x04 0x08 0x10 0x20 0x40 0x80 0 0 0 0 0 0 0 0]) == [0x04 0x08 0x10 0x20 0x40 0x80 0 0 0 0 0 0 0 0 0 0]
|
|
|
|
function %i16x8_shl_const(i16x8) -> i16x8 {
|
|
block0(v0: i16x8):
|
|
v1 = iconst.i32 4
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %i16x8_shl_const([0x0001 0x0002 0x0004 0x0008 0x0010 0x0020 0x0040 0x0080]) == [0x0010 0x0020 0x0040 0x0080 0x0100 0x0200 0x0400 0x0800]
|
|
; run: %i16x8_shl_const([0x0100 0x0200 0x0400 0x0800 0x1000 0x2000 0x4000 0x8000]) == [0x1000 0x2000 0x4000 0x8000 0 0 0 0]
|
|
|
|
function %i32x4_shl_const(i32x4) -> i32x4 {
|
|
block0(v0: i32x4):
|
|
v1 = iconst.i32 4
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %i32x4_shl_const([0x00000001 0x00000002 0x00000004 0x00000008]) == [0x00000010 0x00000020 0x00000040 0x00000080]
|
|
; run: %i32x4_shl_const([0x10000000 0x00010000 0xf0000000 0x02000000]) == [0 0x00100000 0 0x20000000]
|
|
|
|
function %i64x2_shl_const(i64x2) -> i64x2 {
|
|
block0(v0: i64x2):
|
|
v1 = iconst.i32 32
|
|
v2 = ishl v0, v1
|
|
return v2
|
|
}
|
|
; run: %i64x2_shl_const([0x1 0xf]) == [0x100000000 0xf00000000]
|
|
; run: %i64x2_shl_const([0x100000000 0]) == [0 0]
|