Add a conditional branch instruction with two targets: brif. This instruction will eventually replace brz and brnz, as it encompasses the behavior of both. This PR also changes the InstructionData layout for instruction formats that hold BlockCall values, taking the same approach we use for Value arguments. This allows branch_destination to return a slice to the BlockCall values held in the instruction, rather than requiring that we pattern match on InstructionData to fetch the then/else blocks. Function generation for fuzzing has been updated to generate uses of brif, and I've run the cranelift-fuzzgen target locally for hours without triggering any new failures.
200 lines
7.6 KiB
Rust
200 lines
7.6 KiB
Rust
//! Instruction predicates/properties, shared by various analyses.
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use crate::ir::immediates::Offset32;
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use crate::ir::instructions::BranchInfo;
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use crate::ir::{Block, DataFlowGraph, Function, Inst, InstructionData, Opcode, Type, Value};
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use cranelift_entity::EntityRef;
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/// Preserve instructions with used result values.
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pub fn any_inst_results_used(inst: Inst, live: &[bool], dfg: &DataFlowGraph) -> bool {
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dfg.inst_results(inst).iter().any(|v| live[v.index()])
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}
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/// Test whether the given opcode is unsafe to even consider as side-effect-free.
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#[inline(always)]
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fn trivially_has_side_effects(opcode: Opcode) -> bool {
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opcode.is_call()
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|| opcode.is_branch()
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|| opcode.is_terminator()
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|| opcode.is_return()
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|| opcode.can_trap()
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|| opcode.other_side_effects()
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|| opcode.can_store()
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}
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/// Load instructions without the `notrap` flag are defined to trap when
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/// operating on inaccessible memory, so we can't treat them as side-effect-free even if the loaded
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/// value is unused.
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#[inline(always)]
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fn is_load_with_defined_trapping(opcode: Opcode, data: &InstructionData) -> bool {
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if !opcode.can_load() {
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return false;
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}
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match *data {
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InstructionData::StackLoad { .. } => false,
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InstructionData::Load { flags, .. } => !flags.notrap(),
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_ => true,
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}
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}
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/// Does the given instruction have any side-effect that would preclude it from being removed when
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/// its value is unused?
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#[inline(always)]
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pub fn has_side_effect(func: &Function, inst: Inst) -> bool {
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let data = &func.dfg.insts[inst];
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let opcode = data.opcode();
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trivially_has_side_effects(opcode) || is_load_with_defined_trapping(opcode, data)
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}
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/// Does the given instruction behave as a "pure" node with respect to
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/// aegraph semantics?
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///
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/// - Actual pure nodes (arithmetic, etc)
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/// - Loads with the `readonly` flag set
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pub fn is_pure_for_egraph(func: &Function, inst: Inst) -> bool {
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let is_readonly_load = match func.dfg.insts[inst] {
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InstructionData::Load {
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opcode: Opcode::Load,
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flags,
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..
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} => flags.readonly() && flags.notrap(),
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_ => false,
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};
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// Multi-value results do not play nicely with much of the egraph
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// infrastructure. They are in practice used only for multi-return
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// calls and some other odd instructions (e.g. iadd_cout) which,
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// for now, we can afford to leave in place as opaque
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// side-effecting ops. So if more than one result, then the inst
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// is "not pure". Similarly, ops with zero results can be used
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// only for their side-effects, so are never pure. (Or if they
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// are, we can always trivially eliminate them with no effect.)
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let has_one_result = func.dfg.inst_results(inst).len() == 1;
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let op = func.dfg.insts[inst].opcode();
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has_one_result && (is_readonly_load || (!op.can_load() && !trivially_has_side_effects(op)))
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}
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/// Can the given instruction be merged into another copy of itself?
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/// These instructions may have side-effects, but as long as we retain
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/// the first instance of the instruction, the second and further
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/// instances are redundant if they would produce the same trap or
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/// result.
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pub fn is_mergeable_for_egraph(func: &Function, inst: Inst) -> bool {
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let op = func.dfg.insts[inst].opcode();
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// We can only merge one-result operators due to the way that GVN
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// is structured in the egraph implementation.
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let has_one_result = func.dfg.inst_results(inst).len() == 1;
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has_one_result
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// Loads/stores are handled by alias analysis and not
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// otherwise mergeable.
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&& !op.can_load()
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&& !op.can_store()
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// Can only have idempotent side-effects.
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&& (!has_side_effect(func, inst) || op.side_effects_idempotent())
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}
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/// Does the given instruction have any side-effect as per [has_side_effect], or else is a load,
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/// but not the get_pinned_reg opcode?
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pub fn has_lowering_side_effect(func: &Function, inst: Inst) -> bool {
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let op = func.dfg.insts[inst].opcode();
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op != Opcode::GetPinnedReg && (has_side_effect(func, inst) || op.can_load())
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}
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/// Is the given instruction a constant value (`iconst`, `fconst`) that can be
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/// represented in 64 bits?
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pub fn is_constant_64bit(func: &Function, inst: Inst) -> Option<u64> {
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let data = &func.dfg.insts[inst];
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if data.opcode() == Opcode::Null {
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return Some(0);
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}
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match data {
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&InstructionData::UnaryImm { imm, .. } => Some(imm.bits() as u64),
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&InstructionData::UnaryIeee32 { imm, .. } => Some(imm.bits() as u64),
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&InstructionData::UnaryIeee64 { imm, .. } => Some(imm.bits()),
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_ => None,
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}
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}
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/// Get the address, offset, and access type from the given instruction, if any.
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pub fn inst_addr_offset_type(func: &Function, inst: Inst) -> Option<(Value, Offset32, Type)> {
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let data = &func.dfg.insts[inst];
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match data {
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InstructionData::Load { arg, offset, .. } => {
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let ty = func.dfg.value_type(func.dfg.inst_results(inst)[0]);
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Some((*arg, *offset, ty))
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}
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InstructionData::LoadNoOffset { arg, .. } => {
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let ty = func.dfg.value_type(func.dfg.inst_results(inst)[0]);
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Some((*arg, 0.into(), ty))
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}
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InstructionData::Store { args, offset, .. } => {
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let ty = func.dfg.value_type(args[0]);
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Some((args[1], *offset, ty))
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}
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InstructionData::StoreNoOffset { args, .. } => {
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let ty = func.dfg.value_type(args[0]);
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Some((args[1], 0.into(), ty))
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}
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_ => None,
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}
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}
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/// Get the store data, if any, from an instruction.
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pub fn inst_store_data(func: &Function, inst: Inst) -> Option<Value> {
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let data = &func.dfg.insts[inst];
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match data {
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InstructionData::Store { args, .. } | InstructionData::StoreNoOffset { args, .. } => {
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Some(args[0])
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}
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_ => None,
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}
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}
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/// Determine whether this opcode behaves as a memory fence, i.e.,
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/// prohibits any moving of memory accesses across it.
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pub fn has_memory_fence_semantics(op: Opcode) -> bool {
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match op {
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Opcode::AtomicRmw
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| Opcode::AtomicCas
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| Opcode::AtomicLoad
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| Opcode::AtomicStore
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| Opcode::Fence
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| Opcode::Debugtrap => true,
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Opcode::Call | Opcode::CallIndirect => true,
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op if op.can_trap() => true,
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_ => false,
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}
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}
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/// Visit all successors of a block with a given visitor closure. The closure
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/// arguments are the branch instruction that is used to reach the successor,
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/// the successor block itself, and a flag indicating whether the block is
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/// branched to via a table entry.
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pub(crate) fn visit_block_succs<F: FnMut(Inst, Block, bool)>(
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f: &Function,
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block: Block,
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mut visit: F,
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) {
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for inst in f.layout.block_likely_branches(block) {
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match f.dfg.insts[inst].analyze_branch() {
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BranchInfo::NotABranch => {}
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BranchInfo::SingleDest(dest) => {
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visit(inst, dest.block(&f.dfg.value_lists), false);
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}
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BranchInfo::Conditional(block_then, block_else) => {
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visit(inst, block_then.block(&f.dfg.value_lists), false);
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visit(inst, block_else.block(&f.dfg.value_lists), false);
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}
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BranchInfo::Table(table, dest) => {
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// The default block is reached via a direct conditional branch,
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// so it is not part of the table.
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visit(inst, dest, false);
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for &dest in f.jump_tables[table].as_slice() {
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visit(inst, dest, true);
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}
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}
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}
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}
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}
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