4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
28 lines
1.1 KiB
Plaintext
28 lines
1.1 KiB
Plaintext
test compile
|
|
target x86_64
|
|
|
|
; Like %big in probestack.cton, but without a colocated libcall.
|
|
|
|
function %big() system_v {
|
|
ss0 = explicit_slot 300000
|
|
ebb0:
|
|
return
|
|
}
|
|
; check: function %big(i64 fp [%rbp]) -> i64 fp [%rbp] system_v {
|
|
; nextln: ss0 = explicit_slot 300000, offset -300016
|
|
; nextln: ss1 = incoming_arg 16, offset -16
|
|
; nextln: sig0 = (i64 [%rax]) -> i64 [%rax] probestack
|
|
; nextln: fn0 = %Probestack sig0
|
|
; nextln:
|
|
; nextln: ebb0(v0: i64 [%rbp]):
|
|
; nextln: [RexOp1pushq#50] x86_push v0
|
|
; nextln: [RexOp1copysp#8089] copy_special %rsp -> %rbp
|
|
; nextln: [RexOp1pu_id#b8,%rax] v1 = iconst.i64 0x0004_93e0
|
|
; nextln: [RexOp1fnaddr8#80b8,%r11] v2 = func_addr.i64 fn0
|
|
; nextln: [RexOp1call_r#20ff,%rax] v3 = call_indirect sig0, v2(v1)
|
|
; nextln: [RexOp1adjustsp#8029] adjust_sp_down v3
|
|
; nextln: [RexOp1adjustsp_id#8081] adjust_sp_up_imm 0x0004_93e0
|
|
; nextln: [RexOp1popq#58,%rbp] v4 = x86_pop.i64
|
|
; nextln: [Op1ret#c3] return v4
|
|
; nextln: }
|