9b06f76057
* LICM pass * Uses loop analysis to detect loop tree * For each loop (starting with the inner ones), create a pre-header and move there loop-invariant instructions * An instruction is loop invariant if it does not use as argument a value defined earlier in the loop * File tests to check LICM's correctness * Optimized pre-header creation If the loop already has a natural pre-header, we use it instead of creating a new one. The natural pre-header of a loop is the only predecessor of the header it doesn't dominate.
82 lines
1.7 KiB
Plaintext
82 lines
1.7 KiB
Plaintext
test licm
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function complex(i32) -> i32 {
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ebb0(v0: i32):
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v1 = iconst.i32 1
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v19 = iconst.i32 4
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v2 = iadd v1, v0
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brz v0, ebb1(v1)
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jump ebb3(v2)
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ebb1(v3: i32):
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v4 = iconst.i32 2
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v5 = iadd v3, v2
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v6 = iadd v4, v0
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jump ebb2(v6)
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ebb2(v7: i32):
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v8 = iadd v7, v3
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v9 = iadd v0, v2
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brz v0, ebb1(v7)
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jump ebb5(v8)
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ebb3(v10: i32):
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v11 = iconst.i32 3
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v12 = iadd v10, v11
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v13 = iadd v2, v11
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jump ebb4(v11)
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ebb4(v14: i32):
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v15 = iadd v12, v2
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brz v0, ebb3(v14)
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jump ebb5(v14)
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ebb5(v16: i32):
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v17 = iadd v16, v1
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v18 = iadd v1, v19
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brz v0, ebb0(v18)
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return v17
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}
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; sameln: function complex(i32) -> i32 {
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; nextln: ebb6(v20: i32):
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; nextln: v1 = iconst.i32 1
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; nextln: v2 = iconst.i32 4
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; nextln: v5 = iconst.i32 2
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; nextln: v12 = iconst.i32 3
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; nextln: v19 = iadd v1, v2
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; nextln: jump ebb0(v20)
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; nextln:
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; nextln: ebb0(v0: i32):
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; nextln: v3 = iadd.i32 v1, v0
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; nextln: v7 = iadd.i32 v5, v0
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; nextln: v10 = iadd v0, v3
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; nextln: brz v0, ebb1(v1)
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; nextln: v14 = iadd v3, v12
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; nextln: jump ebb3(v3)
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; nextln:
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; nextln: ebb1(v4: i32):
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; nextln: v6 = iadd v4, v3
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; nextln: jump ebb2(v7)
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; nextln:
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; nextln: ebb2(v8: i32):
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; nextln: v9 = iadd v8, v4
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; nextln: brz.i32 v0, ebb1(v8)
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; nextln: jump ebb5(v9)
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; nextln:
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; nextln: ebb3(v11: i32):
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; nextln: v13 = iadd v11, v12
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; nextln: jump ebb4(v12)
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; nextln:
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; nextln: ebb4(v15: i32):
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; nextln: v16 = iadd.i32 v13, v3
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; nextln: brz.i32 v0, ebb3(v15)
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; nextln: jump ebb5(v15)
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; nextln:
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; nextln: ebb5(v17: i32):
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; nextln: v18 = iadd v17, v1
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; nextln: brz.i32 v0, ebb0(v19)
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; nextln: return v18
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; nextln: }
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