SIMD & FP registers are now saved and restored in pairs, similarly to general-purpose registers. Also, only the bottom 64 bits of the registers are saved and restored (in case of non-Baldrdash ABIs), which is the requirement from the Procedure Call Standard for the Arm 64-bit Architecture. As for the callee-saved general-purpose registers, if a procedure needs to save and restore an odd number of them, it no longer uses store and load pair instructions for the last register. Copyright (c) 2021, Arm Limited.
This crate contains the core Cranelift code generator. It translates code from an intermediate representation into executable machine code.