Jakob Stoklund Olesen a0085434af Add encodings for Intel dynamic shift instructions. ...

These instructions have a fixed register constraint; the shift amount is
passed in CL.

Add meta language syntax so a fixed register can be specified as
"GPR.rcx".

2017-05-09 13:11:50 -07:00

..

arm32

Add a section about implementation limits.

2017-02-24 11:08:15 -08:00

arm64

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

intel

Add encodings for Intel dynamic shift instructions.

2017-05-09 13:11:50 -07:00

riscv

Add an enable_e setting for the RV32E instruction set.

2017-04-26 13:50:52 -07:00

__init__.py

Fixed for mypy 0.501.

2017-03-03 09:08:28 -08:00