Jakob Stoklund Olesen 85aab278dd Add RISC-V encodings for b1 copy/spill/fill. ...

We allow b1 values in general purpose registers, so we need to be able
to move them around.

2018-01-16 09:19:22 -08:00

..

__init__.py

Generate register bank descriptions.

2016-11-22 18:15:21 -08:00

defs.py

Use uppercase for the global riscv.ISA constant.

2016-11-11 11:17:40 -08:00

encodings.py

Add RISC-V encodings for b1 copy/spill/fill.

2018-01-16 09:19:22 -08:00

recipes.py

Align IntelGOTPCRel4 with R_X86_64_GOTPCREL.

2017-12-15 16:17:32 -06:00

registers.py

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

settings.py

Add an enable_e setting for the RV32E instruction set.

2017-04-26 13:50:52 -07:00