6f8a54b6a5
Changes: * Adds a new generic instruction, SELECTIF, that does value selection (a la conditional move) similarly to existing SELECT, except that it is controlled by condition code input and flags-register inputs. * Adds a new Intel x86_64 variant, 'baseline', that supports SSE2 and nothing else. * Adds new Intel x86_64 instructions BSR and BSF. * Implements generic CLZ, CTZ and POPCOUNT on x86_64 'baseline' targets using the new BSR, BSF and SELECTIF instructions. * Implements SELECTIF on x86_64 targets using conditional-moves. * new test filetests/isa/intel/baseline_clz_ctz_popcount.cton (for legalization) * new test filetests/isa/intel/baseline_clz_ctz_popcount_encoding.cton (for encoding) * Allow lib/cretonne/meta/gen_legalizer.py to generate non-snake-caseified Rust without rustc complaining. Fixes #238.
49 lines
1.5 KiB
Python
49 lines
1.5 KiB
Python
"""
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Intel settings.
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"""
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from __future__ import absolute_import
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from cdsl.settings import SettingGroup, BoolSetting, Preset
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from cdsl.predicates import And
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import base.settings as shared
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from .defs import ISA
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ISA.settings = SettingGroup('intel', parent=shared.group)
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# The has_* settings here correspond to CPUID bits.
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# CPUID.01H:EDX
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has_sse2 = BoolSetting("SSE2: CPUID.01H:EDX.SSE2[bit 26]")
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# CPUID.01H:ECX
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has_sse3 = BoolSetting("SSE3: CPUID.01H:ECX.SSE3[bit 0]")
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has_ssse3 = BoolSetting("SSSE3: CPUID.01H:ECX.SSSE3[bit 9]")
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has_sse41 = BoolSetting("SSE4.1: CPUID.01H:ECX.SSE4_1[bit 19]")
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has_sse42 = BoolSetting("SSE4.2: CPUID.01H:ECX.SSE4_2[bit 20]")
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has_popcnt = BoolSetting("POPCNT: CPUID.01H:ECX.POPCNT[bit 23]")
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has_avx = BoolSetting("AVX: CPUID.01H:ECX.AVX[bit 28]")
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# CPUID.(EAX=07H, ECX=0H):EBX
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has_bmi1 = BoolSetting("BMI1: CPUID.(EAX=07H, ECX=0H):EBX.BMI1[bit 3]")
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has_bmi2 = BoolSetting("BMI2: CPUID.(EAX=07H, ECX=0H):EBX.BMI2[bit 8]")
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# CPUID.EAX=80000001H:ECX
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has_lzcnt = BoolSetting("LZCNT: CPUID.EAX=80000001H:ECX.LZCNT[bit 5]")
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# The use_* settings here are used to determine if a feature can be used.
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use_sse41 = And(has_sse41)
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use_sse42 = And(has_sse42, use_sse41)
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use_popcnt = And(has_popcnt, has_sse42)
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use_bmi1 = And(has_bmi1)
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use_lzcnt = And(has_lzcnt)
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# Presets corresponding to Intel CPUs.
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baseline = Preset(has_sse2)
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nehalem = Preset(
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has_sse2, has_sse3, has_ssse3, has_sse41, has_sse42, has_popcnt)
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haswell = Preset(nehalem, has_bmi1, has_lzcnt)
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ISA.settings.close(globals())
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