Jakob Stoklund Olesen 6ba604125d Add bitwise ops that invert the second operand. ...

ARM has all of these as scalar integer instructions. Intel has band_not
in SSE and as a scalar in BMI1.

Add the trivial legalization patterns that use a bnot instruction.

2017-07-20 11:20:06 -07:00

..

base

Add bitwise ops that invert the second operand.

2017-07-20 11:20:06 -07:00

cdsl

Add support for setting presets.

2017-07-14 13:57:44 -07:00

isa

Intel encodings for fadd, fsub, fmul, fdiv.

2017-07-20 10:40:11 -07:00

build.py

Add a mypy.ini file and enable some more warnings.

2017-03-30 19:52:49 -07:00

check.sh

Run Python checks from test-all.sh

2017-01-25 14:12:36 -08:00

constant_hash.py

Run mypy in python 3 mode.

2017-05-08 13:29:01 -07:00

gen_binemit.py

Don't require that the fallthrough instruction has an encoding.

2017-07-19 09:30:04 -07:00

gen_build_deps.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

gen_encoding.py

Add RISC-V encodings for spill and fill.

2017-06-13 13:39:52 -07:00

gen_instr.py

Emit runtime type checks in legalizer.rs (#112)

2017-07-10 15:28:32 -07:00

gen_legalizer.py

Add fix for #114 (#115)

2017-07-12 08:51:55 -07:00

gen_registers.py

Generate an enum with all the register units in a target.

2017-06-30 10:39:51 -07:00

gen_settings.py

Add support for setting presets.

2017-07-14 13:57:44 -07:00

gen_types.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00

mypy.ini

Run mypy in python 3 mode.

2017-05-08 13:29:01 -07:00

srcgen.py

Add a fmt.multi_line() method to srcgen.Formatter.

2017-07-07 15:10:17 -07:00

test_constant_hash.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

test_gen_legalizer.py

Add fix for #114 (#115)

2017-07-12 08:51:55 -07:00

test_srcgen.py

Move the 'meta' dir to 'lib/cretonne/meta'.

2016-10-17 14:19:23 -07:00

unique_table.py

Add more mypy annotations.

2017-03-30 15:16:44 -07:00