6ba604125d
ARM has all of these as scalar integer instructions. Intel has band_not in SSE and as a scalar in BMI1. Add the trivial legalization patterns that use a bnot instruction.
39 lines
834 B
Plaintext
39 lines
834 B
Plaintext
; Test the legalization of i32 instructions that don't have RISC-V versions.
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test legalizer
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set is_64bit=0
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isa riscv supports_m=1
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set is_64bit=1
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isa riscv supports_m=1
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; regex: V=v\d+
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function %carry_out(i32, i32) -> i32, b1 {
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ebb0(v1: i32, v2: i32):
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v3, v4 = iadd_cout v1, v2
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return v3, v4
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}
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; check: $v3 = iadd $v1, $v2
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; check: $v4 = icmp ult $v3, $v1
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; check: return $v3, $v4
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; Expanding illegal immediate constants.
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; Note that at some point we'll probably expand the iconst as well.
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function %large_imm(i32) -> i32 {
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ebb0(v0: i32):
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v1 = iadd_imm v0, 1000000000
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return v1
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}
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; check: $(cst=$V) = iconst.i32 0x3b9a_ca00
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; check: $v1 = iadd $v0, $cst
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; check: return $v1
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function %bitclear(i32, i32) -> i32 {
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ebb0(v0: i32, v1: i32):
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v2 = band_not v0, v1
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; check: bnot
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; check: band
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return v2
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}
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