Jakob Stoklund Olesen 3a47b40ff8 Add RISC-V encodings for brz and brnz. ...

These branches compare a register to zero. RISC-V implements this with
the %x0 hard-coded zero register.

2017-04-03 15:20:57 -07:00

..

cfg

Add a 'test verifier' sub-test.

2016-09-16 16:25:36 -07:00

domtree

Implement a domtree sub-test.

2016-09-16 14:50:32 -07:00

isa/riscv

Add RISC-V encodings for brz and brnz.

2017-04-03 15:20:57 -07:00

parser

Add the br_icmp instruction.

2017-04-03 15:04:42 -07:00

regalloc

Add a 'regalloc' filetest command.

2017-02-22 11:53:01 -08:00

verifier

Add a 'test verifier' sub-test.

2016-09-16 16:25:36 -07:00