ca0e8d0a1d
In #3721, we have been discussing what to do about the ARM32 backend in Cranelift. Currently, this backend supports only 32-bit types, which is insufficient for full Wasm-MVP; it's missing other critical bits, like floating-point support; and it has only ever been exercised, AFAIK, via the filetests for the individual CLIF instructions that are implemented. We were very very thankful for the original contribution of this backend, even in its partial state, and we had hoped at the time that we could eventually mature it in-tree until it supported e.g. Wasm and other use-cases. But that hasn't yet happened -- to the blame of no-one, to be clear, we just haven't had a contributor with sufficient time. Unfortunately, the existence of the backend and lack of active maintainer now potentially pose a bit of a burden as we hope to make continuing changes to the backend framework. For example, the ISLE migration, and the use of regalloc2 that it will allow, would need all of the existing lowering patterns in the hand-written ARM32 backend to be rewritten as ISLE rules. Given that we don't currently have the resources to do this, we think it's probably best if we, sadly, for now remove this partial backend. This is not in any way a statement of what we might accept in the future, though. If, in the future, an ARM32 backend updated to our latest codebase with an active maintainer were to appear, we'd be happy to merge it (and likewise for any other architecture!). But for now, this is probably the best path. Thanks again to the original contributor @jmkrauz and we hope that this work can eventually be brought back and reused if someone has the time to do so!
63 lines
1.6 KiB
Rust
63 lines
1.6 KiB
Rust
//! Define supported ISAs; includes ISA-specific instructions, encodings, registers, settings, etc.
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use crate::cdsl::isa::TargetIsa;
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use crate::shared::Definitions as SharedDefinitions;
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use std::fmt;
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mod arm64;
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mod s390x;
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pub(crate) mod x86;
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/// Represents known ISA target.
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#[derive(PartialEq, Copy, Clone)]
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pub enum Isa {
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X86,
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Arm64,
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S390x,
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}
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impl Isa {
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/// Creates isa target using name.
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pub fn from_name(name: &str) -> Option<Self> {
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Isa::all()
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.iter()
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.cloned()
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.find(|isa| isa.to_string() == name)
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}
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/// Creates isa target from arch.
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pub fn from_arch(arch: &str) -> Option<Self> {
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match arch {
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"aarch64" => Some(Isa::Arm64),
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"s390x" => Some(Isa::S390x),
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x if ["x86_64", "i386", "i586", "i686"].contains(&x) => Some(Isa::X86),
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_ => None,
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}
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}
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/// Returns all supported isa targets.
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pub fn all() -> &'static [Isa] {
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&[Isa::X86, Isa::Arm64, Isa::S390x]
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}
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}
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impl fmt::Display for Isa {
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// These names should be kept in sync with the crate features.
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fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
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match *self {
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Isa::X86 => write!(f, "x86"),
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Isa::Arm64 => write!(f, "arm64"),
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Isa::S390x => write!(f, "s390x"),
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}
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}
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}
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pub(crate) fn define(isas: &[Isa], shared_defs: &mut SharedDefinitions) -> Vec<TargetIsa> {
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isas.iter()
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.map(|isa| match isa {
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Isa::X86 => x86::define(shared_defs),
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Isa::Arm64 => arm64::define(shared_defs),
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Isa::S390x => s390x::define(shared_defs),
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})
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.collect()
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}
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