630cb3ee62
Only i16x8 and i32x4 are encoded in this commit mainly because i8x16 and i64x2 do not have simple encodings in x86. i64x2 is not required by the SIMD spec and there is discussion (https://github.com/WebAssembly/simd/pull/98#issuecomment-530092217) about removing i8x16.
167 lines
3.7 KiB
Plaintext
167 lines
3.7 KiB
Plaintext
test run
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test binemit
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test legalizer
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set enable_simd
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target x86_64 skylake
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function %iadd_i32x4() -> b1 {
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ebb0:
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[-, %xmm0] v0 = vconst.i32x4 [1 1 1 1]
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[-, %xmm1] v1 = vconst.i32x4 [1 2 3 4]
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[-, %xmm0] v2 = iadd v0, v1 ; bin: 66 0f fe c1
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, 2
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v5 = extractlane v2, 3
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v6 = icmp_imm eq v5, 5
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; TODO replace extractlanes with vector comparison
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v7 = band v4, v6
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return v7
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}
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; run
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function %iadd_i8x16_with_overflow() -> b1 {
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ebb0:
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[-, %xmm0] v0 = vconst.i8x16 [255 255 255 255 255 255 255 255 255 255 255 255 255 255 255 255]
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[-, %xmm7] v1 = vconst.i8x16 [2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2]
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[-, %xmm0] v2 = iadd v0, v1 ; bin: 66 0f fc c7
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, 1
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; TODO replace extractlane with vector comparison
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return v4
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}
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; run
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function %iadd_i16x8(i16x8, i16x8) -> i16x8 {
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ebb0(v0: i16x8 [%xmm1], v1: i16x8 [%xmm2]):
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[-, %xmm1] v2 = iadd v0, v1 ; bin: 66 0f fd ca
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return v2
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}
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function %iadd_i64x2(i64x2, i64x2) -> i64x2 {
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ebb0(v0: i64x2 [%xmm3], v1: i64x2 [%xmm4]):
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[-, %xmm3] v2 = iadd v0, v1 ; bin: 66 0f d4 dc
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return v2
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}
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function %isub_i32x4() -> b1 {
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ebb0:
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[-, %xmm3] v0 = vconst.i32x4 [1 1 1 1]
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[-, %xmm5] v1 = vconst.i32x4 [1 2 3 4]
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[-, %xmm3] v2 = isub v0, v1 ; bin: 66 0f fa dd
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, 0
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v5 = extractlane v2, 1
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v6 = icmp_imm eq v5, 0xffffffff
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; TODO replace extractlanes with vector comparison
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v7 = band v4, v6
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return v7
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}
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; run
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function %isub_i64x2(i64x2, i64x2) -> i64x2 {
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ebb0(v0: i64x2 [%xmm0], v1: i64x2 [%xmm1]):
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[-, %xmm0] v2 = isub v0, v1 ; bin: 66 0f fb c1
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return v2
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}
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function %isub_i16x8(i16x8, i16x8) -> i16x8 {
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ebb0(v0: i16x8 [%xmm3], v1: i16x8 [%xmm4]):
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[-, %xmm3] v2 = isub v0, v1 ; bin: 66 0f f9 dc
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return v2
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}
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function %isub_i8x16(i8x16, i8x16) -> i8x16 {
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ebb0(v0: i8x16 [%xmm3], v1: i8x16 [%xmm4]):
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[-, %xmm3] v2 = isub v0, v1 ; bin: 66 0f f8 dc
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return v2
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}
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function %ineg_i32x4() -> b1 {
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ebb0:
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v0 = vconst.i32x4 [1 1 1 1]
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v2 = ineg v0
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; check: v5 = vconst.i32x4 0x00
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; nextln: v2 = isub v5, v0
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, -1
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return v4 ; bin: c3
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}
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; run
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function %ineg_legalized() {
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ebb0:
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v0 = vconst.i8x16 0x00
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v1 = ineg v0
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; check: v6 = vconst.i8x16 0x00
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; nextln: v1 = isub v6, v0
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v2 = raw_bitcast.i16x8 v0
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v3 = ineg v2
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; check: v7 = vconst.i16x8 0x00
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; nextln: v3 = isub v7, v2
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v4 = raw_bitcast.i64x2 v0
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v5 = ineg v4
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; check: v8 = vconst.i64x2 0x00
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; nextln: v5 = isub v8, v4
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return ; bin: c3
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}
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function %imul_i32x4() -> b1 {
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ebb0:
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[-, %xmm0] v0 = vconst.i32x4 [-1 0 1 -2147483647] ; e.g. -2147483647 == 0x80_00_00_01
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[-, %xmm1] v1 = vconst.i32x4 [2 2 2 2]
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[-, %xmm0] v2 = imul v0, v1 ; bin: 66 0f 38 40 c1
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, -2
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v5 = extractlane v2, 1
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v6 = icmp_imm eq v5, 0
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v7 = extractlane v2, 3
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v8 = icmp_imm eq v7, 2 ; 0x80_00_00_01 * 2 == 0x1_00_00_00_02 (and the 1 is dropped)
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v9 = band v4, v6
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v10 = band v8, v9
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return v10
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}
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; run
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function %imul_i16x8() -> b1 {
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ebb0:
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[-, %xmm1] v0 = vconst.i16x8 [-1 0 1 32767 0 0 0 0] ; e.g. 32767 == 0x7f_ff
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[-, %xmm2] v1 = vconst.i16x8 [2 2 2 2 0 0 0 0]
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[-, %xmm1] v2 = imul v0, v1 ; bin: 66 0f d5 ca
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v3 = extractlane v2, 0
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v4 = icmp_imm eq v3, 0xfffe ; TODO -2 will not work here and below because v3 is being
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; uextend-ed, not sextend-ed
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v5 = extractlane v2, 1
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v6 = icmp_imm eq v5, 0
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v7 = extractlane v2, 3
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v8 = icmp_imm eq v7, 0xfffe ; 0x7f_ff * 2 == 0xff_fe
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v9 = band v4, v6
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v10 = band v8, v9
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return v4
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}
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; run
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