230e2135d6
* Cranelift: remove non-egraphs optimization pipeline and `use_egraphs` option. This PR removes the LICM, GVN, and preopt passes, and associated support pieces, from `cranelift-codegen`. Not to worry, we still have optimizations: the egraph framework subsumes all of these, and has been on by default since #5181. A few decision points: - Filetests for the legacy LICM, GVN and simple_preopt were removed too. As we built optimizations in the egraph framework we wrote new tests for the equivalent functionality, and many of the old tests were testing specific behaviors in the old implementations that may not be relevant anymore. However if folks prefer I could take a different approach here and try to port over all of the tests. - The corresponding filetest modes (commands) were deleted too. The `test alias_analysis` mode remains, but no longer invokes a separate GVN first (since there is no separate GVN that will not also do alias analysis) so the tests were tweaked slightly to work with that. The egrpah testsuite also covers alias analysis. - The `divconst_magic_numbers` module is removed since it's unused without `simple_preopt`, though this is the one remaining optimization we still need to build in the egraphs framework, pending #5908. The magic numbers will live forever in git history so removing this in the meantime is not a major issue IMHO. - The `use_egraphs` setting itself was removed at both the Cranelift and Wasmtime levels. It has been marked deprecated for a few releases now (Wasmtime 6.0, 7.0, upcoming 8.0, and corresponding Cranelift versions) so I think this is probably OK. As an alternative if anyone feels strongly, we could leave the setting and make it a no-op. * Update test outputs for remaining test differences.
211 lines
3.6 KiB
Plaintext
211 lines
3.6 KiB
Plaintext
test compile precise-output
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target aarch64
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function %store_scale() {
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gv0 = dyn_scale_target_const.i32x4
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ss0 = explicit_slot 8
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block0:
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v0 = global_value.i64 gv0
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stack_store.i64 v0, ss0
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return
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; movz x1, #1
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; mov x2, sp
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; str x1, [x2]
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; mov x1, #1
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; mov x2, sp
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; str x1, [x2]
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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function %store_scale_lt_128() {
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gv0 = dyn_scale_target_const.i16x4
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ss0 = explicit_slot 8
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block0:
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v0 = global_value.i64 gv0
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stack_store.i64 v0, ss0
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return
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; movz x1, #1
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; mov x2, sp
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; str x1, [x2]
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; mov x1, #1
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; mov x2, sp
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; str x1, [x2]
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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function %store_explicit(i32) {
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gv0 = dyn_scale_target_const.i32x4
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dt0 = i32x4*gv0
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dss0 = explicit_dynamic_slot dt0
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block0(v0: i32):
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v1 = splat.dt0 v0
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dynamic_stack_store.dt0 v1, dss0
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return
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; dup v3.4s, w0
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; mov x3, sp
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; str q3, [x3]
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; dup v3.4s, w0
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; mov x3, sp
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; str q3, [x3]
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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function %load_explicit() -> i32x4 {
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gv0 = dyn_scale_target_const.i32x4
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dt0 = i32x4*gv0
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dss0 = explicit_dynamic_slot dt0
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block0:
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v0 = dynamic_stack_load.dt0 dss0
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v1 = extract_vector.dt0 v0, 0
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return v1
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; mov x2, sp
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; ldr q0, [x2]
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; mov x2, sp
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; ldr q0, [x2]
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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function %store_implicit(i32) {
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gv0 = dyn_scale_target_const.i32x4
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dt0 = i32x4*gv0
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dss0 = explicit_dynamic_slot dt0
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block0(v0: i32):
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v1 = splat.dt0 v0
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dynamic_stack_store v1, dss0
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return
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; dup v3.4s, w0
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; mov x3, sp
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; str q3, [x3]
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; dup v3.4s, w0
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; mov x3, sp
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; str q3, [x3]
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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function %addr() -> i64 {
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gv0 = dyn_scale_target_const.i32x4
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dt0 = i32x4*gv0
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dss0 = explicit_dynamic_slot dt0
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block0:
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v0 = dynamic_stack_addr.i64 dss0
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return v0
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}
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; VCode:
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; stp fp, lr, [sp, #-16]!
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; mov fp, sp
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; sub sp, sp, #16
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; block0:
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; mov x0, sp
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; add sp, sp, #16
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; ldp fp, lr, [sp], #16
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; stp x29, x30, [sp, #-0x10]!
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; mov x29, sp
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; sub sp, sp, #0x10
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; block1: ; offset 0xc
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; mov x0, sp
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; add sp, sp, #0x10
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; ldp x29, x30, [sp], #0x10
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; ret
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