1c014d129a
Addresses #3809: when we are asked to create a Cranelift backend with shared flags that indicate support for SIMD, we should check that the ISA level needed for our SIMD lowerings is present.
40 lines
1.3 KiB
Plaintext
40 lines
1.3 KiB
Plaintext
test run
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target aarch64
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; target s390x TODO: Not yet implemented on s390x
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set enable_simd
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target x86_64 has_sse3 has_ssse3 has_sse41
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function %fcvt_from_sint(i32x4) -> f32x4 {
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block0(v0: i32x4):
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v1 = fcvt_from_sint.f32x4 v0
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return v1
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}
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; run: %fcvt_from_sint([-1 0 1 123456789]) == [-0x1.0 0.0 0x1.0 0x75bcd18.0]
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; Note that 123456789 rounds to 123456792.0, an error of 3
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function %fcvt_from_uint(i32x4) -> f32x4 {
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block0(v0: i32x4):
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v1 = fcvt_from_uint.f32x4 v0
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return v1
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}
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; run: %fcvt_from_uint([0 0 0 0]) == [0x0.0 0x0.0 0x0.0 0x0.0]
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; run: %fcvt_from_uint([0xFFFFFFFF 0 1 123456789]) == [0x100000000.0 0.0 0x1.0 0x75bcd18.0]
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; Note that 0xFFFFFFFF is decimal 4,294,967,295 and is rounded up 1 to 4,294,967,296 in f32x4.
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function %fcvt_to_sint_sat(f32x4) -> i32x4 {
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block0(v0:f32x4):
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v1 = fcvt_to_sint_sat.i32x4 v0
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return v1
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}
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; run: %fcvt_to_sint_sat([0x0.0 -0x1.0 0x1.0 0x1.0p100]) == [0 -1 1 0x7FFFFFFF]
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; run: %fcvt_to_sint_sat([-0x8.1 0x0.0 0x0.0 -0x1.0p100]) == [-8 0 0 0x80000000]
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function %fcvt_to_uint_sat(f32x4) -> i32x4 {
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block0(v0:f32x4):
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v1 = fcvt_to_uint_sat.i32x4 v0
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return v1
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}
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; run: %fcvt_to_uint_sat([0x1.0 0x4.2 0x4.6 0x1.0p100]) == [1 4 4 0xFFFFFFFF]
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; run: %fcvt_to_uint_sat([-0x8.1 -0x0.0 0x0.0 -0x1.0p100]) == [0 0 0 0]
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; run: %fcvt_to_uint_sat([0xB2D05E00.0 0.0 0.0 0.0]) == [3000000000 0 0 0]
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