Andrew Brown 5d8dd648d7 x64: port fcmp to ISLE (#3967) ...

* x64: port scalar `fcmp` to ISLE

Implement the CLIF lowering for the `fcmp` to ISLE. This adds a new
type-matcher, `ty_scalar_float`, for detecting uses of `F32` and `F64`.

* isle: rename `vec128` to `ty_vec12`

This refactoring changes the name of the `vec128` matcher function to
follow the `ty_*` convention of the other type matchers. It also makes
the helper an inline function call.

* x64: port vector `fcmp` to ISLE

2022-03-29 15:41:49 -07:00

..

abi_impl.rs

Pass the ISA-specific compilation flags to the ABI implementations

2022-01-14 14:18:01 +00:00

abi.rs

Fix spillslot size bug in SIMD by removing type-dependent spillslot allocation.

2022-01-04 13:24:40 -08:00

blockorder.rs

Cranelift: Fix cold-blocks-related lowering bug.

2022-01-21 10:47:49 -08:00

buffer.rs

Ensure functions are aligned properly on AArch64 (#3908)

2022-03-09 15:45:30 -06:00

compile.rs

Remove MachBackend

2022-01-06 15:08:12 +01:00

debug.rs

Cranelift: fix debuginfo wrt cold blocks and non-monotonic layout.

2022-02-04 23:15:04 -08:00

helpers.rs

x86-64 Windows fastcall ABI support.

2021-03-03 19:53:18 -08:00

inst_common.rs

More atomic ops

2021-02-18 14:16:15 +01:00

isle.rs

x64: port fcmp to ISLE (#3967)

2022-03-29 15:41:49 -07:00

lower.rs

Remove incomplete/unmaintained ARM32 backend (for now). (#3799)

2022-02-14 15:03:52 -08:00

mod.rs

Ensure functions are aligned properly on AArch64 (#3908)

2022-03-09 15:45:30 -06:00

regmapping.rs

aarch64: Migrate uextend/sextend to ISLE

2021-12-14 07:01:37 -08:00

valueregs.rs

Remove incomplete/unmaintained ARM32 backend (for now). (#3799)

2022-02-14 15:03:52 -08:00

vcode.rs

Cranelift: fix debuginfo wrt cold blocks and non-monotonic layout.

2022-02-04 23:15:04 -08:00