4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
102 lines
1.5 KiB
Plaintext
102 lines
1.5 KiB
Plaintext
; Test basic code generation for f64 arithmetic WebAssembly instructions.
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test compile
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target x86_64 haswell
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target x86_64 baseline
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; Constants.
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function %f64_const() -> f64 {
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ebb0:
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v1 = f64const 0x3.0
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return v1
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}
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; Unary operations
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function %f64_abs(f64) -> f64 {
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ebb0(v0: f64):
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v1 = fabs v0
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return v1
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}
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function %f64_neg(f64) -> f64 {
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ebb0(v0: f64):
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v1 = fneg v0
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return v1
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}
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function %f64_sqrt(f64) -> f64 {
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ebb0(v0: f64):
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v1 = sqrt v0
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return v1
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}
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function %f64_ceil(f64) -> f64 {
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ebb0(v0: f64):
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v1 = ceil v0
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return v1
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}
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function %f64_floor(f64) -> f64 {
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ebb0(v0: f64):
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v1 = floor v0
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return v1
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}
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function %f64_trunc(f64) -> f64 {
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ebb0(v0: f64):
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v1 = trunc v0
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return v1
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}
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function %f64_nearest (f64) -> f64 {
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ebb0(v0: f64):
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v1 = nearest v0
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return v1
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}
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; Binary Operations
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function %f64_add(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fadd v0, v1
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return v2
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}
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function %f64_sub(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fsub v0, v1
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return v2
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}
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function %f64_mul(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fmul v0, v1
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return v2
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}
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function %f64_div(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fdiv v0, v1
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return v2
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}
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function %f64_min(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fmin v0, v1
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return v2
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}
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function %f64_max(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fmax v0, v1
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return v2
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}
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function %f64_copysign(f64, f64) -> f64 {
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ebb0(v0: f64, v1: f64):
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v2 = fcopysign v0, v1
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return v2
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}
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