4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
49 lines
854 B
Plaintext
49 lines
854 B
Plaintext
; Test code generation for WebAssembly f32 comparison operators.
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test compile
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target i686 haswell
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target x86_64 haswell
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function %f32_eq(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp eq v0, v1
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v3 = bint.i32 v2
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return v3
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}
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function %f32_ne(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp ne v0, v1
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v3 = bint.i32 v2
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return v3
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}
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function %f32_lt(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp lt v0, v1
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v3 = bint.i32 v2
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return v3
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}
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function %f32_gt(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp gt v0, v1
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v3 = bint.i32 v2
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return v3
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}
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function %f32_le(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp le v0, v1
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v3 = bint.i32 v2
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return v3
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}
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function %f32_ge(f32, f32) -> i32 {
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ebb0(v0: f32, v1: f32):
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v2 = fcmp ge v0, v1
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v3 = bint.i32 v2
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return v3
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}
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