4e67e08efd
This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
47 lines
1.3 KiB
Plaintext
47 lines
1.3 KiB
Plaintext
test regalloc
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target i686
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; regex: V=v\d+
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; The value v9 appears both as the branch control and one of the EBB arguments
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; in the brnz instruction in ebb2. It also happens that v7 and v9 are assigned
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; to the same register, so v9 doesn't need to be moved before the brnz.
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;
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; This ended up confusong the constraint solver which had not made a record of
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; the fixed register assignment for v9 since it was already in the correct
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; register.
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function %pr147(i32) -> i32 system_v {
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ebb0(v0: i32):
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v1 = iconst.i32 0
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v2 = iconst.i32 1
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v3 = iconst.i32 0
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jump ebb2(v3, v2, v0)
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ebb2(v4: i32, v5: i32, v7: i32):
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; check: ebb2
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v6 = iadd v4, v5
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v8 = iconst.i32 -1
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; v7 is killed here and v9 gets the same register.
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v9 = iadd v7, v8
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; check: v9 = iadd v7, v8
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; Here v9 the brnz control appears to interfere with v9 the EBB argument,
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; so divert_fixed_input_conflicts() calls add_var(v9), which is ok. The
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; add_var sanity checks got confused when no fixed assignment could be
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; found for v9.
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;
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; We should be able to handle this situation without making copies of v9.
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brnz v9, ebb2(v5, v6, v9)
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; check: brnz v9, ebb2($V, $V, v9)
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jump ebb3
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ebb3:
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return v5
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}
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function %select_i64(i64, i64, i32) -> i64 {
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ebb0(v0: i64, v1: i64, v2: i32):
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v3 = select v2, v0, v1
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return v3
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}
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