This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
36 lines
638 B
Plaintext
36 lines
638 B
Plaintext
test regalloc
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target x86_64 haswell
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function %value_aliases(i32, f32, i64 vmctx) baldrdash {
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gv0 = vmctx
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heap0 = static gv0, min 0x0001_0000, bound 0x0001_0000_0000, guard 0x8000_0000
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ebb0(v0: i32, v1: f32, v2: i64):
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v3 = iconst.i32 0
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jump ebb3(v3)
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ebb3(v4: i32):
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v5 = heap_addr.i64 heap0, v4, 1
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v6 = load.f32 v5
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v7 -> v1
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v8 = fdiv v6, v7
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v9 = heap_addr.i64 heap0, v4, 1
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store v8, v9
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v10 = iconst.i32 4
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v11 = iadd v4, v10
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v12 -> v0
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v13 = icmp ult v11, v12
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v14 = bint.i32 v13
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brnz v14, ebb3(v11)
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jump ebb4
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ebb4:
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jump ebb2
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ebb2:
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jump ebb1
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ebb1:
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return
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}
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