This switches from a custom list of architectures to use the target-lexicon crate. - "set is_64bit=1; isa x86" is replaced with "target x86_64", and similar for other architectures, and the `is_64bit` flag is removed entirely. - The `is_compressed` flag is removed too; it's no longer being used to control REX prefixes on x86-64, ARM and Thumb are separate architectures in target-lexicon, and we can figure out how to select RISC-V compressed encodings when we're ready.
22 lines
510 B
Plaintext
22 lines
510 B
Plaintext
test verifier
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target riscv32
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function %RV32I(i32 link [%x1]) -> i32 link [%x1] {
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fn0 = %foo()
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ebb0(v9999: i32):
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; iconst.i32 needs legalizing, so it should throw a
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[R#0,-] v1 = iconst.i32 0xf0f0f0f0f0 ; error: Instruction failed to re-encode
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return v9999
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}
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function %RV32I(i32 link [%x1]) -> i32 link [%x1] {
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fn0 = %foo()
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ebb0(v9999: i32):
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v1 = iconst.i32 1
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v2 = iconst.i32 2
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[R#0,-] v3 = iadd v1, v2 ; error: encoding R#00 should be R#0c
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return v9999
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}
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