Alex Crichton 709f7e0c8a Enable SSE 4.2 unconditionally (#3833) ...

* Enable SSE 4.2 unconditionally

Fuzzing over the weekend found that `i64x2` comparison operators
require `pcmpgtq` which is an SSE 4.2 instruction. Along the lines of #3816
this commit unconditionally enables and requires SSE 4.2 for compilation
and fuzzing. It will no longer be possible to create a compiler for
x86_64 with simd enabled if SSE 4.2 is disabled.

* Update comment

2022-02-22 13:23:51 -06:00

..

binemit

Remove all Sink traits

2022-01-11 19:03:10 +01:00

ir

Cranelift: add support for cold blocks.

2022-01-19 12:17:41 -08:00

isa

Enable SSE 4.2 unconditionally (#3833)

2022-02-22 13:23:51 -06:00

legalizer

Move arg unpacking for all remaining expand functions to simple_legalize

2021-10-31 18:26:25 +01:00

machinst

Remove incomplete/unmaintained ARM32 backend (for now). (#3799)

2022-02-14 15:03:52 -08:00

verifier

Remove instructions necessary for the old regalloc

2021-10-12 14:37:36 +02:00

bitset.rs

cranelift: Implement serialize/deserialize for stack maps

2020-05-28 11:34:58 -07:00

cfg_printer.rs

Remove more old backend ISA concepts (#3402)

2021-10-04 10:36:12 +02:00

clif.isle

ISLE: Fix clif.isle InstructionData entries

2022-01-24 12:54:16 +01:00

constant_hash.rs

Share constant_hash code between the meta and codegen crates;

2019-10-10 16:45:48 +02:00

context.rs

Remove sink arguments from compile_and_emit

2022-01-11 18:17:29 +01:00

cursor.rs

Cranelift: remove unused EncCursor

2021-10-04 19:11:52 +02:00

data_value.rs

cranelift: Add support for i128 immediates in parser

2021-09-19 15:02:04 +01:00

dbg.rs

moved crates in lib/ to src/, renamed crates, modified some files' text (#660)

2019-01-28 15:56:54 -08:00

dce.rs

Address review comments:

2020-04-15 17:21:28 -07:00

divconst_magic_numbers.rs

Fix clippy warnings.

2019-10-24 17:20:12 -07:00

dominator_tree.rs

Skip non-branching blocks now that we're using basic blocks

2020-03-05 16:11:13 +01:00

flowgraph.rs

Skip non-branching blocks now that we're using basic blocks

2020-03-05 16:11:13 +01:00

fx.rs

moved crates in lib/ to src/, renamed crates, modified some files' text (#660)

2019-01-28 15:56:54 -08:00

inst_predicates.rs

Remove ancient register allocation (#3401)

2021-09-30 21:27:23 +02:00

iterators.rs

Always use extern crate std in cranelift-codegen

2019-10-02 11:50:44 -07:00

lib.rs

Remove sink arguments from compile_and_emit

2022-01-11 18:17:29 +01:00

licm.rs

Cranelift: remove unused EncCursor

2021-10-04 19:11:52 +02:00

log.rs

cranelift: use a deferred display wrapper for logging the vcode's IR

2021-04-16 10:27:19 +02:00

loop_analysis.rs

Rename 'an block' to 'a block'

2020-03-03 13:21:13 -06:00

nan_canonicalization.rs

cranelift: Implement nan canonicalization for vectors (#3146)

2021-08-05 13:44:16 -05:00

prelude.isle

ISLE: Common accessors for some insn data fields (#3781)

2022-02-08 17:57:27 -08:00

preopt.peepmatic

Remove instructions necessary for the old regalloc

2021-10-12 14:37:36 +02:00

print_errors.rs

Remove more old backend ISA concepts (#3402)

2021-10-04 10:36:12 +02:00

remove_constant_phis.rs

Remove spam from "do_remove_constant_phis"

2020-07-17 18:14:16 +02:00

result.rs

Add comment why thiserror is not used

2021-05-04 13:51:28 +02:00

scoped_hash_map.rs

Allow building without std (#1069)

2019-09-26 18:00:03 +02:00

settings.rs

Implement Display for settings::Value

2021-07-03 14:34:42 +02:00

simple_gvn.rs

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

simple_preopt.rs

Remove Peepmatic!!!

2021-11-17 13:04:17 -08:00

souper_harvest.rs

souper-harvest: ensure that select conditions are of type i1

2020-12-03 14:43:28 -08:00

timing.rs

Add some debug logging for timing in module compiles (#3417)

2021-10-11 12:50:15 -05:00

unreachable_code.rs

Remove more old backend ISA concepts (#3402)

2021-10-04 10:36:12 +02:00

value_label.rs

Remove ancient register allocation (#3401)

2021-09-30 21:27:23 +02:00

write.rs

Add syntax for cold blocks to CLIF.

2022-01-20 16:49:52 -08:00