171 lines
6.3 KiB
Python
171 lines
6.3 KiB
Python
"""
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Generate binary emission code for each ISA.
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"""
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from __future__ import absolute_import
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from cdsl.registers import RegClass, Stack
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import srcgen
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try:
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from typing import Sequence, List # noqa
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from cdsl.isa import TargetISA, EncRecipe, OperandConstraint # noqa
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except ImportError:
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pass
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def gen_recipe(recipe, fmt):
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# type: (EncRecipe, srcgen.Formatter) -> None
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"""
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Generate code to handle a single recipe.
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- Unpack the instruction data, knowing the format.
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- Determine register locations for operands with register constraints.
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- Determine stack slot locations for operands with stack constraints.
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- Call hand-written code for the actual emission.
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"""
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iform = recipe.format
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nvops = iform.num_value_operands
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want_args = any(isinstance(i, RegClass) or isinstance(i, Stack)
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for i in recipe.ins)
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assert not want_args or nvops > 0 or iform.has_value_list
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want_outs = any(isinstance(o, RegClass) or isinstance(o, Stack)
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for o in recipe.outs)
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# Regmove instructions get special treatment.
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is_regmove = (recipe.format.name in ('RegMove', 'RegSpill', 'RegFill'))
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# First unpack the instruction.
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with fmt.indented(
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'if let InstructionData::{} {{'.format(iform.name),
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'}'):
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fmt.line('opcode,')
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for f in iform.imm_fields:
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fmt.line('{},'.format(f.member))
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if want_args:
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if iform.has_value_list or nvops > 1:
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fmt.line('ref args,')
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else:
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fmt.line('arg,')
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fmt.line('..')
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fmt.outdented_line('} = func.dfg[inst] {')
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# Pass recipe arguments in this order: inputs, imm_fields, outputs.
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args = ''
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# Normalize to an `args` array.
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if want_args and not is_regmove:
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if iform.has_value_list:
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fmt.line('let args = args.as_slice(&func.dfg.value_lists);')
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elif nvops == 1:
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fmt.line('let args = [arg];')
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args += unwrap_values(recipe.ins, 'in', 'args', fmt)
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for f in iform.imm_fields:
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args += ', ' + f.member
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# Unwrap interesting output arguments.
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if want_outs:
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if len(recipe.outs) == 1:
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fmt.line('let results = [func.dfg.first_result(inst)];')
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else:
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fmt.line('let results = func.dfg.inst_results(inst);')
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args += unwrap_values(recipe.outs, 'out', 'results', fmt)
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# Special handling for regmove instructions. Update the register
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# diversion tracker.
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if recipe.format.name == 'RegMove':
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fmt.line('divert.regmove(arg, src, dst);')
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elif recipe.format.name == 'RegSpill':
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fmt.line('divert.regspill(arg, src, dst);')
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elif recipe.format.name == 'RegFill':
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fmt.line('divert.regfill(arg, src, dst);')
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# Call hand-written code. If the recipe contains a code snippet, use
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# that. Otherwise cal a recipe function in the target ISA's binemit
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# module.
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if recipe.emit is None:
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fmt.format(
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'return recipe_{}(func, inst, sink, bits{});',
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recipe.name.lower(), args)
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else:
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fmt.multi_line(recipe.emit)
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fmt.line('return;')
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def unwrap_values(args, prefix, values, fmt):
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# type: (Sequence[OperandConstraint], str, str, srcgen.Formatter) -> str # noqa
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"""
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Emit code that unwraps values living in registers or stack slots.
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:param args: Input or output constraints.
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:param prefix: Prefix to be used for the generated local variables.
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:param values: Name of slice containing the values to be unwrapped.
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:returns: Comma separated list of the generated variables
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"""
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varlist = ''
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for i, cst in enumerate(args):
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if isinstance(cst, RegClass):
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v = '{}_reg{}'.format(prefix, i)
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varlist += ', ' + v
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fmt.format(
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'let {} = divert.reg({}[{}], &func.locations);',
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v, values, i)
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elif isinstance(cst, Stack):
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v = '{}_stk{}'.format(prefix, i)
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varlist += ', ' + v
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with fmt.indented(
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'let {} = StackRef::masked('.format(v),
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').unwrap();'):
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fmt.format('divert.stack({}[{}], &func.locations),', values, i)
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fmt.format('{},', cst.stack_base_mask())
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fmt.line('&func.stack_slots,')
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return varlist
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def gen_isa(isa, fmt):
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# type: (TargetISA, srcgen.Formatter) -> None
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"""
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Generate Binary emission code for `isa`.
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"""
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fmt.doc_comment(
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'''
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Emit binary machine code for `inst` for the {} ISA.
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'''.format(isa.name))
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if len(isa.all_recipes) == 0:
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# No encoding recipes: Emit a stub.
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with fmt.indented('pub fn emit_inst<CS: CodeSink + ?Sized>('):
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fmt.line('func: &Function,')
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fmt.line('inst: Inst,')
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fmt.line('_divert: &mut RegDiversions,')
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fmt.line('_sink: &mut CS,')
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with fmt.indented(') {', '}'):
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fmt.line('bad_encoding(func, inst)')
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else:
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fmt.line('#[allow(unused_variables, unreachable_code)]')
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with fmt.indented('pub fn emit_inst<CS: CodeSink + ?Sized>('):
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fmt.line('func: &Function,')
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fmt.line('inst: Inst,')
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fmt.line('divert: &mut RegDiversions,')
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fmt.line('sink: &mut CS,')
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with fmt.indented(') {', '}'):
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fmt.line('let encoding = func.encodings[inst];')
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fmt.line('let bits = encoding.bits();')
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with fmt.indented('match func.encodings[inst].recipe() {', '}'):
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for i, recipe in enumerate(isa.all_recipes):
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fmt.comment('Recipe {}'.format(recipe.name))
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with fmt.indented('{} => {{'.format(i), '}'):
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gen_recipe(recipe, fmt)
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fmt.line('_ => {},')
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# Allow for un-encoded ghost instructions.
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# Verifier checks the details.
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with fmt.indented('if encoding.is_legal() {', '}'):
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fmt.line('bad_encoding(func, inst);')
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def generate(isas, out_dir):
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# type: (Sequence[TargetISA], str) -> None
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for isa in isas:
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fmt = srcgen.Formatter()
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gen_isa(isa, fmt)
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fmt.update_file('binemit-{}.rs'.format(isa.name), out_dir)
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