83c3bc5b9d
Implemented the following Opcodes for the Cranelift interpreter: - `Unarrow` to combine two SIMD vectors into a new vector with twice the lanes but half the width, with signed inputs which are clamped to `0x00`. - `Uunarrow` to perform the same operation as `Unarrow` but treating inputs as unsigned. - `Snarrow` to perform the same operation as `Unarrow` but treating both inputs and outputs as signed, and saturating accordingly. Note that all 3 instructions saturate at the type boundaries. Copyright (c) 2021, Arm Limited
12 lines
315 B
Plaintext
12 lines
315 B
Plaintext
test interpret
|
|
test run
|
|
target aarch64
|
|
; x86_64 considers the case `i64x2` -> `i32x4` to be 'unreachable'
|
|
|
|
function %snarrow_i64x2(i64x2, i64x2) -> i32x4 {
|
|
block0(v0: i64x2, v1: i64x2):
|
|
v2 = snarrow v0, v1
|
|
return v2
|
|
}
|
|
; run: %snarrow_i64x2([65535 -100000], [5000000000 73]) == [65535 -100000 2147483647 73]
|