Jakob Stoklund Olesen 377550b835 Add return_reg encodings for RISC-V.

2017-02-21 16:29:23 -08:00

..

arm32

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

arm64

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

intel

Generate register class descriptors.

2017-01-20 14:23:06 -08:00

riscv

Add return_reg encodings for RISC-V.

2017-02-21 16:29:23 -08:00

__init__.py

Add stubs for Intel and ARM architectures.

2016-11-11 11:32:05 -08:00