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This patch provides the bottom layer of the ARM64 backend: it defines the `Inst` type, which represents a single machine instruction, and defines emission routines to produce machine code from a `VCode` container of `Insts`. The backend cannot produce `Inst`s with just this patch; that will come with later parts. This patch contains code written by Julian Seward <jseward@acm.org> and Benjamin Bouvier <public@benj.me>, originally developed on a side-branch before rebasing and condensing into this patch series. See the `arm64` branch at `https://github.com/cfallin/wasmtime` for original development history. This patch also contains code written by Joey Gouly <joey.gouly@arm.com> and contributed to the above branch. These contributions are "Copyright (c) 2020, Arm Limited." Finally, a contribution from Joey Gouly contains the following notice: This is a port of VIXL's Assembler::IsImmLogical. Arm has the original copyright on the VIXL code this was ported from and is relicensing it under Apache 2 for Cranelift. Co-authored-by: Julian Seward <jseward@acm.org> Co-authored-by: Benjamin Bouvier <public@benj.me> Co-authored-by: Joey Gouly <joey.gouly@arm.com>
This crate contains the core Cranelift code generator. It translates code from an intermediate representation into executable machine code.