cb48ea406e
This PR switches the default backend on x86, for both the `cranelift-codegen` crate and for Wasmtime, to the new (`MachInst`-style, `VCode`-based) backend that has been under development and testing for some time now. The old backend is still available by default in builds with the `old-x86-backend` feature, or by requesting `BackendVariant::Legacy` from the appropriate APIs. As part of that switch, it adds some more runtime-configurable plumbing to the testing infrastructure so that tests can be run using the appropriate backend. `clif-util test` is now capable of parsing a backend selector option from filetests and instantiating the correct backend. CI has been updated so that the old x86 backend continues to run its tests, just as we used to run the new x64 backend separately. At some point, we will remove the old x86 backend entirely, once we are satisfied that the new backend has not caused any unforeseen issues and we do not need to revert.
62 lines
1.9 KiB
Plaintext
62 lines
1.9 KiB
Plaintext
test legalizer
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target x86_64 legacy haswell
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;; Test that we don't reuse `sret` stack slots for multiple calls. We could do
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;; this one day, but it would require some care to ensure that we don't have
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;; subsequent calls overwrite the results of previous calls.
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function %foo() -> i32, f32 {
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; check: ss0 = sret_slot 20
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; nextln: ss1 = sret_slot 20
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fn0 = %f() -> i32, i32, i32, i32, i32
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fn1 = %g() -> f32, f32, f32, f32, f32
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; check: sig0 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: sig1 = (i64 sret [%rdi]) -> i64 sret [%rax] fast
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; nextln: fn0 = %f sig0
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; nextln: fn1 = %g sig1
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block0:
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v0, v1, v2, v3, v4 = call fn0()
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; check: v18 = stack_addr.i64 ss0
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; nextln: v25 = func_addr.i64 fn0
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; nextln: v19 = call_indirect sig0, v25(v18)
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; nextln: v20 = load.i32 notrap aligned v19
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; nextln: v0 -> v20
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; nextln: v21 = load.i32 notrap aligned v19+4
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; nextln: v1 -> v21
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; nextln: v22 = load.i32 notrap aligned v19+8
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; nextln: v2 -> v22
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; nextln: v23 = load.i32 notrap aligned v19+12
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; nextln: v3 -> v23
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; nextln: v24 = load.i32 notrap aligned v19+16
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; nextln: v4 -> v24
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v5, v6, v7, v8, v9 = call fn1()
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; check: v26 = stack_addr.i64 ss1
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; nextln: v33 = func_addr.i64 fn1
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; nextln: v27 = call_indirect sig1, v33(v26)
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; nextln: v28 = load.f32 notrap aligned v27
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; nextln: v5 -> v28
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; nextln: v29 = load.f32 notrap aligned v27+4
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; nextln: v6 -> v29
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; nextln: v30 = load.f32 notrap aligned v27+8
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; nextln: v7 -> v30
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; nextln: v31 = load.f32 notrap aligned v27+12
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; nextln: v8 -> v31
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; nextln: v32 = load.f32 notrap aligned v27+16
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; nextln: v9 -> v32
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v10 = iadd v0, v1
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v11 = iadd v2, v3
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v12 = iadd v10, v11
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v13 = iadd v12, v4
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v14 = fadd v5, v6
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v15 = fadd v7, v8
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v16 = fadd v14, v15
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v17 = fadd v16, v9
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return v13, v17
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}
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