114 lines
3.4 KiB
Python
114 lines
3.4 KiB
Python
"""
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Supplementary instruction definitions for Intel.
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This module defines additional instructions that are useful only to the Intel
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target ISA.
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"""
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from cdsl.operands import Operand
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from cdsl.typevar import TypeVar
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from cdsl.instructions import Instruction, InstructionGroup
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GROUP = InstructionGroup("x86", "Intel-specific instruction set")
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iWord = TypeVar('iWord', 'A scalar integer machine word', ints=(32, 64))
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nlo = Operand('nlo', iWord, doc='Low part of numerator')
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nhi = Operand('nhi', iWord, doc='High part of numerator')
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d = Operand('d', iWord, doc='Denominator')
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q = Operand('q', iWord, doc='Quotient')
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r = Operand('r', iWord, doc='Remainder')
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udivmodx = Instruction(
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'x86_udivmodx', r"""
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Extended unsigned division.
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Concatenate the bits in `nhi` and `nlo` to form the numerator.
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Interpret the bits as an unsigned number and divide by the unsigned
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denominator `d`. Trap when `d` is zero or if the quotient is larger
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than the range of the output.
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Return both quotient and remainder.
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""",
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ins=(nlo, nhi, d), outs=(q, r), can_trap=True)
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sdivmodx = Instruction(
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'x86_sdivmodx', r"""
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Extended signed division.
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Concatenate the bits in `nhi` and `nlo` to form the numerator.
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Interpret the bits as a signed number and divide by the signed
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denominator `d`. Trap when `d` is zero or if the quotient is outside
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the range of the output.
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Return both quotient and remainder.
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""",
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ins=(nlo, nhi, d), outs=(q, r), can_trap=True)
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Float = TypeVar(
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'Float', 'A scalar or vector floating point number',
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floats=True, simd=True)
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IntTo = TypeVar(
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'IntTo', 'An integer type with the same number of lanes',
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ints=(32, 64), simd=True)
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x = Operand('x', Float)
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a = Operand('a', IntTo)
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cvtt2si = Instruction(
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'x86_cvtt2si', r"""
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Convert with truncation floating point to signed integer.
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The source floating point operand is converted to a signed integer by
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rounding towards zero. If the result can't be represented in the output
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type, returns the smallest signed value the output type can represent.
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This instruction does not trap.
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""",
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ins=x, outs=a)
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x = Operand('x', Float)
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a = Operand('a', Float)
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y = Operand('y', Float)
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fmin = Instruction(
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'x86_fmin', r"""
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Floating point minimum with Intel semantics.
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This is equivalent to the C ternary operator `x < y ? x : y` which
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differs from :inst:`fmin` when either operand is NaN or when comparing
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+0.0 to -0.0.
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When the two operands don't compare as LT, `y` is returned unchanged,
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even if it is a signalling NaN.
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""",
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ins=(x, y), outs=a)
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fmax = Instruction(
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'x86_fmax', r"""
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Floating point maximum with Intel semantics.
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This is equivalent to the C ternary operator `x > y ? x : y` which
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differs from :inst:`fmax` when either operand is NaN or when comparing
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+0.0 to -0.0.
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When the two operands don't compare as GT, `y` is returned unchanged,
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even if it is a signalling NaN.
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""",
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ins=(x, y), outs=a)
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x = Operand('x', iWord)
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push = Instruction(
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'x86_push', "Pushes onto the stack.",
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ins=x, can_store=True, other_side_effects=True)
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pop = Instruction(
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'x86_pop', "Pops from the stack.",
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outs=x, can_load=True, other_side_effects=True)
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GROUP.close()
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