Andrew Brown 459fce3467 x64: lower i8x16.popcnt to VPOPCNTB when possible ...

When AVX512VL or AVX512BITALG are available, Wasm SIMD's `popcnt`
instruction can be lowered to a single x64 instruction, `VPOPCNTB`,
instead of 8+ instructions.

2021-05-25 12:16:25 -07:00

..

aarch64

Merge pull request #2929 from cfallin/bb-offsets

2021-05-24 14:27:53 -07:00

arm32

Provide BB layout info externally in terms of code offsets.

2021-05-24 09:18:06 -07:00

riscv

Change how flags are stored in serialized modules.

2021-04-01 21:39:57 -07:00

s390x

Provide BB layout info externally in terms of code offsets.

2021-05-24 09:18:06 -07:00

unwind

Add comment why thiserror is not used

2021-05-04 13:51:28 +02:00

x64

x64: lower i8x16.popcnt to VPOPCNTB when possible

2021-05-25 12:16:25 -07:00

x86

Generate unwind information on Win64 with the old backend

2021-04-16 18:05:49 +02:00

call_conv.rs

Fully support multiple returns in Wasmtime (#2806)

2021-04-07 12:34:26 -05:00

constraints.rs

Mass rename Ebb and relatives to Block (#1365)

2020-02-07 10:46:47 -06:00

enc_tables.rs

[meta] Remove mentions to Python in comments of the non-meta crate;

2019-07-05 17:50:17 +02:00

encoding.rs

Add serde serialization support for the full clif ir

2021-02-18 11:27:02 +01:00

mod.rs

x64: make the x64 module public

2021-05-13 10:46:08 -07:00

registers.rs

Remove dependency on hard-coded ordering of x86 register banks

2020-03-06 10:53:22 -08:00

stack.rs

Codegen: Align representation of stackmap with SpiderMonkey

2020-01-23 13:37:11 -06:00

test_utils.rs

Remove reloc_block

2020-11-11 12:36:17 +01:00

unwind.rs

Allow unwind support to work without a frame pointer

2021-04-14 15:32:31 +02:00