43a86f14d5
This also paves the way for unifying TargetIsa and MachBackend, since now they map one to one. In theory the two traits could be merged, which would be nice to limit the number of total concepts. Also they have quite different responsibilities, so it might be fine to keep them separate. Interestingly, this PR started as removing RegInfo from the TargetIsa trait since the adapter returned a dummy value there. From the fallout, noticed that all Display implementations didn't needed an ISA anymore (since these were only used to render ISA specific registers). Also the whole family of RegInfo / ValueLoc / RegUnit was exclusively used for the old backend, and these could be removed. Notably, some IR instructions needed to be removed, because they were using RegUnit too: this was the oddball of regfill / regmove / regspill / copy_special, which were IR instructions inserted by the old regalloc. Fare thee well!
176 lines
7.6 KiB
Rust
176 lines
7.6 KiB
Rust
use crate::cdsl::operands::{EnumValues, OperandKind, OperandKindFields};
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use std::collections::HashMap;
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pub(crate) struct Immediates {
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/// A 64-bit immediate integer operand.
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///
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/// This type of immediate integer can interact with SSA values with any IntType type.
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pub imm64: OperandKind,
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/// An unsigned 8-bit immediate integer operand.
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///
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/// This small operand is used to indicate lane indexes in SIMD vectors and immediate bit
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/// counts on shift instructions.
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pub uimm8: OperandKind,
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/// An unsigned 32-bit immediate integer operand.
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pub uimm32: OperandKind,
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/// An unsigned 128-bit immediate integer operand.
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///
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/// This operand is used to pass entire 128-bit vectors as immediates to instructions like
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/// const.
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pub uimm128: OperandKind,
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/// A constant stored in the constant pool.
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///
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/// This operand is used to pass constants to instructions like vconst while storing the
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/// actual bytes in the constant pool.
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pub pool_constant: OperandKind,
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/// A 32-bit immediate signed offset.
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///
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/// This is used to represent an immediate address offset in load/store instructions.
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pub offset32: OperandKind,
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/// A 32-bit immediate floating point operand.
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///
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/// IEEE 754-2008 binary32 interchange format.
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pub ieee32: OperandKind,
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/// A 64-bit immediate floating point operand.
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///
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/// IEEE 754-2008 binary64 interchange format.
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pub ieee64: OperandKind,
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/// An immediate boolean operand.
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///
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/// This type of immediate boolean can interact with SSA values with any BoolType type.
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pub boolean: OperandKind,
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/// A condition code for comparing integer values.
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///
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/// This enumerated operand kind is used for the `icmp` instruction and corresponds to the
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/// condcodes::IntCC` Rust type.
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pub intcc: OperandKind,
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/// A condition code for comparing floating point values.
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///
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/// This enumerated operand kind is used for the `fcmp` instruction and corresponds to the
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/// `condcodes::FloatCC` Rust type.
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pub floatcc: OperandKind,
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/// Flags for memory operations like `load` and `store`.
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pub memflags: OperandKind,
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/// A trap code indicating the reason for trapping.
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///
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/// The Rust enum type also has a `User(u16)` variant for user-provided trap codes.
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pub trapcode: OperandKind,
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/// A code indicating the arithmetic operation to perform in an atomic_rmw memory access.
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pub atomic_rmw_op: OperandKind,
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}
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fn new_imm(format_field_name: &'static str, rust_type: &'static str) -> OperandKind {
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OperandKind::new(format_field_name, rust_type, OperandKindFields::ImmValue)
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}
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fn new_enum(
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format_field_name: &'static str,
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rust_type: &'static str,
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values: EnumValues,
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) -> OperandKind {
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OperandKind::new(
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format_field_name,
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rust_type,
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OperandKindFields::ImmEnum(values),
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)
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}
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impl Immediates {
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pub fn new() -> Self {
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Self {
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imm64: new_imm("imm", "ir::immediates::Imm64").with_doc("A 64-bit immediate integer."),
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uimm8: new_imm("imm", "ir::immediates::Uimm8")
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.with_doc("An 8-bit immediate unsigned integer."),
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uimm32: new_imm("imm", "ir::immediates::Uimm32")
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.with_doc("A 32-bit immediate unsigned integer."),
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uimm128: new_imm("imm", "ir::Immediate")
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.with_doc("A 128-bit immediate unsigned integer."),
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pool_constant: new_imm("constant_handle", "ir::Constant")
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.with_doc("A constant stored in the constant pool."),
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offset32: new_imm("offset", "ir::immediates::Offset32")
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.with_doc("A 32-bit immediate signed offset."),
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ieee32: new_imm("imm", "ir::immediates::Ieee32")
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.with_doc("A 32-bit immediate floating point number."),
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ieee64: new_imm("imm", "ir::immediates::Ieee64")
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.with_doc("A 64-bit immediate floating point number."),
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boolean: new_imm("imm", "bool").with_doc("An immediate boolean."),
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intcc: {
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let mut intcc_values = HashMap::new();
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intcc_values.insert("eq", "Equal");
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intcc_values.insert("ne", "NotEqual");
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intcc_values.insert("sge", "SignedGreaterThanOrEqual");
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intcc_values.insert("sgt", "SignedGreaterThan");
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intcc_values.insert("sle", "SignedLessThanOrEqual");
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intcc_values.insert("slt", "SignedLessThan");
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intcc_values.insert("uge", "UnsignedGreaterThanOrEqual");
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intcc_values.insert("ugt", "UnsignedGreaterThan");
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intcc_values.insert("ule", "UnsignedLessThanOrEqual");
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intcc_values.insert("ult", "UnsignedLessThan");
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intcc_values.insert("of", "Overflow");
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intcc_values.insert("nof", "NotOverflow");
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new_enum("cond", "ir::condcodes::IntCC", intcc_values)
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.with_doc("An integer comparison condition code.")
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},
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floatcc: {
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let mut floatcc_values = HashMap::new();
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floatcc_values.insert("ord", "Ordered");
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floatcc_values.insert("uno", "Unordered");
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floatcc_values.insert("eq", "Equal");
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floatcc_values.insert("ne", "NotEqual");
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floatcc_values.insert("one", "OrderedNotEqual");
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floatcc_values.insert("ueq", "UnorderedOrEqual");
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floatcc_values.insert("lt", "LessThan");
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floatcc_values.insert("le", "LessThanOrEqual");
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floatcc_values.insert("gt", "GreaterThan");
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floatcc_values.insert("ge", "GreaterThanOrEqual");
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floatcc_values.insert("ult", "UnorderedOrLessThan");
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floatcc_values.insert("ule", "UnorderedOrLessThanOrEqual");
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floatcc_values.insert("ugt", "UnorderedOrGreaterThan");
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floatcc_values.insert("uge", "UnorderedOrGreaterThanOrEqual");
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new_enum("cond", "ir::condcodes::FloatCC", floatcc_values)
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.with_doc("A floating point comparison condition code")
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},
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memflags: new_imm("flags", "ir::MemFlags").with_doc("Memory operation flags"),
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trapcode: {
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let mut trapcode_values = HashMap::new();
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trapcode_values.insert("stk_ovf", "StackOverflow");
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trapcode_values.insert("heap_oob", "HeapOutOfBounds");
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trapcode_values.insert("int_ovf", "IntegerOverflow");
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trapcode_values.insert("int_divz", "IntegerDivisionByZero");
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new_enum("code", "ir::TrapCode", trapcode_values).with_doc("A trap reason code.")
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},
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atomic_rmw_op: {
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let mut atomic_rmw_op_values = HashMap::new();
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atomic_rmw_op_values.insert("add", "Add");
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atomic_rmw_op_values.insert("sub", "Sub");
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atomic_rmw_op_values.insert("and", "And");
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atomic_rmw_op_values.insert("nand", "Nand");
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atomic_rmw_op_values.insert("or", "Or");
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atomic_rmw_op_values.insert("xor", "Xor");
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atomic_rmw_op_values.insert("xchg", "Xchg");
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atomic_rmw_op_values.insert("umin", "Umin");
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atomic_rmw_op_values.insert("umax", "Umax");
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atomic_rmw_op_values.insert("smin", "Smin");
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atomic_rmw_op_values.insert("smax", "Smax");
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new_enum("op", "ir::AtomicRmwOp", atomic_rmw_op_values)
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.with_doc("Atomic Read-Modify-Write Ops")
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},
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}
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}
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}
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