Files
wasmtime/cranelift/filetests/filetests/isa/x64/udivrem.clif
Trevor Elliott cc073593a4 Fix block label printing in precise-output tests (#5798)
As a follow-up to #5780, disassemble the regions identified by bb_starts, falling back on disassembling the whole buffer. This ensures that instructions like br_table that introduce a lot of constants don't throw off capstone for the remainder of the function.

---------

Co-authored-by: Jamey Sharp <jamey@minilop.net>
2023-02-16 02:35:26 +00:00

172 lines
3.3 KiB
Plaintext

test compile precise-output
target x86_64
; Ideally these pairs of CLIF instructions should emit a single x86 instruction.
function %udivrem_i8(i8, i8) -> i8, i8 {
block0(v0: i8, v1: i8):
v2 = udiv v0, v1
v3 = urem v0, v1
return v2, v3
}
; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; movzbl %dil, %eax
; div %al, (none), %sil, %al, (none)
; movq %rax, %rcx
; movzbl %dil, %eax
; div %al, (none), %sil, %al, (none)
; movq %rax, %rdx
; shrq $8, %rdx, %rdx
; movq %rcx, %rax
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; movzbl %dil, %eax
; divb %sil ; trap: int_divz
; movq %rax, %rcx
; movzbl %dil, %eax
; divb %sil ; trap: int_divz
; movq %rax, %rdx
; shrq $8, %rdx
; movq %rcx, %rax
; movq %rbp, %rsp
; popq %rbp
; retq
function %udivrem_i16(i16, i16) -> i16, i16 {
block0(v0: i16, v1: i16):
v2 = udiv v0, v1
v3 = urem v0, v1
return v2, v3
}
; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; movl $0, %edx
; movq %rdi, %rax
; div %ax, %dx, %si, %ax, %dx
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; div %ax, %dx, %si, %ax, %dx
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; movl $0, %edx
; movq %rdi, %rax
; divw %si ; trap: int_divz
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; divw %si ; trap: int_divz
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; retq
function %udivrem_i32(i32, i32) -> i32, i32 {
block0(v0: i32, v1: i32):
v2 = udiv v0, v1
v3 = urem v0, v1
return v2, v3
}
; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; movl $0, %edx
; movq %rdi, %rax
; div %eax, %edx, %esi, %eax, %edx
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; div %eax, %edx, %esi, %eax, %edx
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; movl $0, %edx
; movq %rdi, %rax
; divl %esi ; trap: int_divz
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; divl %esi ; trap: int_divz
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; retq
function %udivrem_i64(i64, i64) -> i64, i64 {
block0(v0: i64, v1: i64):
v2 = udiv v0, v1
v3 = urem v0, v1
return v2, v3
}
; VCode:
; pushq %rbp
; movq %rsp, %rbp
; block0:
; movl $0, %edx
; movq %rdi, %rax
; div %rax, %rdx, %rsi, %rax, %rdx
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; div %rax, %rdx, %rsi, %rax, %rdx
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; ret
;
; Disassembled:
; block0: ; offset 0x0
; pushq %rbp
; movq %rsp, %rbp
; block1: ; offset 0x4
; movl $0, %edx
; movq %rdi, %rax
; divq %rsi ; trap: int_divz
; movq %rdi, %rcx
; movq %rax, %r8
; movl $0, %edx
; movq %rcx, %rax
; divq %rsi ; trap: int_divz
; movq %r8, %rax
; movq %rbp, %rsp
; popq %rbp
; retq