cc073593a4
As a follow-up to #5780, disassemble the regions identified by bb_starts, falling back on disassembling the whole buffer. This ensures that instructions like br_table that introduce a lot of constants don't throw off capstone for the remainder of the function. --------- Co-authored-by: Jamey Sharp <jamey@minilop.net>
1014 lines
18 KiB
Plaintext
1014 lines
18 KiB
Plaintext
test compile precise-output
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set enable_llvm_abi_extensions=true
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target x86_64
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function %ishl_i128_i128(i128, i8) -> i128 {
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block0(v0: i128, v1: i8):
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v2 = uextend.i64 v1
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v3 = iconcat v2, v2
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v4 = ishl.i128 v0, v3
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return v4
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movzbq %dl, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx, %rdx
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; movq %rsi, %r11
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; shlq %cl, %r11, %r11
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; movq %rcx, %r9
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; movl $64, %ecx
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; movq %r9, %r8
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; subq %rcx, %r8, %rcx
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; movq %rdi, %r10
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; shrq %cl, %r10, %r10
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; xorq %rax, %rax, %rax
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; testq $127, %r8
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; cmovzq %rax, %r10, %r10
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; orq %r10, %r11, %r10
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; testq $64, %r8
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; cmovzq %rdx, %rax, %rax
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; cmovzq %r10, %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movzbq %dl, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx
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; movq %rsi, %r11
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; shlq %cl, %r11
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; movq %rcx, %r9
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; movl $0x40, %ecx
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; movq %r9, %r8
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; subq %r8, %rcx
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; movq %rdi, %r10
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; shrq %cl, %r10
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; xorq %rax, %rax
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; testq $0x7f, %r8
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; cmoveq %rax, %r10
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; orq %r11, %r10
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; testq $0x40, %r8
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; cmoveq %rdx, %rax
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; cmoveq %r10, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i128_i64(i128, i64) -> i128 {
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block0(v0: i128, v1: i64):
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v2 = ishl.i128 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10, %r10
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; movq %rcx, %r9
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; movl $64, %ecx
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; movq %r9, %rsi
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; subq %rcx, %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9, %r9
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; xorq %rax, %rax, %rax
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; testq $127, %rsi
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; cmovzq %rax, %r9, %r9
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; orq %r9, %r10, %r9
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; testq $64, %rsi
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; cmovzq %rdx, %rax, %rax
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; cmovzq %r9, %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10
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; movq %rcx, %r9
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; movl $0x40, %ecx
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; movq %r9, %rsi
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; subq %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9
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; xorq %rax, %rax
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; testq $0x7f, %rsi
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; cmoveq %rax, %r9
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; orq %r10, %r9
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; testq $0x40, %rsi
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; cmoveq %rdx, %rax
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; cmoveq %r9, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i128_i32(i128, i32) -> i128 {
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block0(v0: i128, v1: i32):
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v2 = ishl.i128 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10, %r10
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; movq %rcx, %r9
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; movl $64, %ecx
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; movq %r9, %rsi
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; subq %rcx, %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9, %r9
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; xorq %rax, %rax, %rax
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; testq $127, %rsi
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; cmovzq %rax, %r9, %r9
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; orq %r9, %r10, %r9
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; testq $64, %rsi
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; cmovzq %rdx, %rax, %rax
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; cmovzq %r9, %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10
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; movq %rcx, %r9
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; movl $0x40, %ecx
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; movq %r9, %rsi
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; subq %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9
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; xorq %rax, %rax
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; testq $0x7f, %rsi
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; cmoveq %rax, %r9
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; orq %r10, %r9
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; testq $0x40, %rsi
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; cmoveq %rdx, %rax
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; cmoveq %r9, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i128_i16(i128, i16) -> i128 {
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block0(v0: i128, v1: i16):
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v2 = ishl.i128 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10, %r10
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; movq %rcx, %r9
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; movl $64, %ecx
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; movq %r9, %rsi
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; subq %rcx, %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9, %r9
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; xorq %rax, %rax, %rax
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; testq $127, %rsi
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; cmovzq %rax, %r9, %r9
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; orq %r9, %r10, %r9
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; testq $64, %rsi
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; cmovzq %rdx, %rax, %rax
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; cmovzq %r9, %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10
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; movq %rcx, %r9
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; movl $0x40, %ecx
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; movq %r9, %rsi
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; subq %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9
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; xorq %rax, %rax
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; testq $0x7f, %rsi
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; cmoveq %rax, %r9
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; orq %r10, %r9
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; testq $0x40, %rsi
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; cmoveq %rdx, %rax
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; cmoveq %r9, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i128_i8(i128, i8) -> i128 {
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block0(v0: i128, v1: i8):
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v2 = ishl.i128 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10, %r10
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; movq %rcx, %r9
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; movl $64, %ecx
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; movq %r9, %rsi
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; subq %rcx, %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9, %r9
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; xorq %rax, %rax, %rax
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; testq $127, %rsi
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; cmovzq %rax, %r9, %r9
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; orq %r9, %r10, %r9
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; testq $64, %rsi
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; cmovzq %rdx, %rax, %rax
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; cmovzq %r9, %rdx, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rdx, %rcx
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; movq %rdi, %rdx
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; shlq %cl, %rdx
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; movq %rsi, %r10
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; shlq %cl, %r10
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; movq %rcx, %r9
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; movl $0x40, %ecx
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; movq %r9, %rsi
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; subq %rsi, %rcx
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; movq %rdi, %r9
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; shrq %cl, %r9
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; xorq %rax, %rax
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; testq $0x7f, %rsi
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; cmoveq %rax, %r9
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; orq %r10, %r9
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; testq $0x40, %rsi
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; cmoveq %rdx, %rax
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; cmoveq %r9, %rdx
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i64_i128(i64, i128) -> i64 {
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block0(v0: i64, v1: i128):
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v2 = ishl.i64 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i32_i128(i32, i128) -> i32 {
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block0(v0: i32, v1: i128):
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v2 = ishl.i32 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shll %cl, %eax, %eax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shll %cl, %eax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i16_i128(i16, i128) -> i16 {
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block0(v0: i16, v1: i128):
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v2 = ishl.i16 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; andq %rcx, $15, %rcx
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; movq %rdi, %rax
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; shlw %cl, %ax, %ax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; andq $0xf, %rcx
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; movq %rdi, %rax
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; shlw %cl, %ax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i8_i128(i8, i128) -> i8 {
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block0(v0: i8, v1: i128):
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v2 = ishl.i8 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; andq %rcx, $7, %rcx
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; movq %rdi, %rax
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; shlb %cl, %al, %al
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; andq $7, %rcx
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; movq %rdi, %rax
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; shlb %cl, %al
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i64_i64(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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v2 = ishl.i64 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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function %ishl_i64_i32(i64, i32) -> i64 {
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block0(v0: i64, v1: i32):
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v2 = ishl.i64 v0, v1
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return v2
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}
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; ret
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;
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; Disassembled:
|
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; block0: ; offset 0x0
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; pushq %rbp
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; movq %rsp, %rbp
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; block1: ; offset 0x4
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; movq %rsi, %rcx
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; movq %rdi, %rax
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; shlq %cl, %rax
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; movq %rbp, %rsp
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; popq %rbp
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; retq
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|
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function %ishl_i64_i16(i64, i16) -> i64 {
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block0(v0: i64, v1: i16):
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v2 = ishl.i64 v0, v1
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return v2
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}
|
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|
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; VCode:
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; pushq %rbp
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; movq %rsp, %rbp
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; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shlq %cl, %rax, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shlq %cl, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i64_i8(i64, i8) -> i64 {
|
|
block0(v0: i64, v1: i8):
|
|
v2 = ishl.i64 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shlq %cl, %rax, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shlq %cl, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i32_i64(i32, i64) -> i32 {
|
|
block0(v0: i32, v1: i64):
|
|
v2 = ishl.i32 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i32_i32(i32, i32) -> i32 {
|
|
block0(v0: i32, v1: i32):
|
|
v2 = ishl.i32 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i32_i16(i32, i16) -> i32 {
|
|
block0(v0: i32, v1: i16):
|
|
v2 = ishl.i32 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i32_i8(i32, i8) -> i32 {
|
|
block0(v0: i32, v1: i8):
|
|
v2 = ishl.i32 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; movq %rdi, %rax
|
|
; shll %cl, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i16_i64(i16, i64) -> i16 {
|
|
block0(v0: i16, v1: i64):
|
|
v2 = ishl.i16 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $15, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $0xf, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i16_i32(i16, i32) -> i16 {
|
|
block0(v0: i16, v1: i32):
|
|
v2 = ishl.i16 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $15, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $0xf, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i16_i16(i16, i16) -> i16 {
|
|
block0(v0: i16, v1: i16):
|
|
v2 = ishl.i16 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $15, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $0xf, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i16_i8(i16, i8) -> i16 {
|
|
block0(v0: i16, v1: i8):
|
|
v2 = ishl.i16 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $15, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $0xf, %rcx
|
|
; movq %rdi, %rax
|
|
; shlw %cl, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i8_i64(i8, i64) -> i8 {
|
|
block0(v0: i8, v1: i64):
|
|
v2 = ishl.i8 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i8_i32(i8, i32) -> i8 {
|
|
block0(v0: i8, v1: i32):
|
|
v2 = ishl.i8 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i8_i16(i8, i16) -> i8 {
|
|
block0(v0: i8, v1: i16):
|
|
v2 = ishl.i8 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i8_i8(i8, i8) -> i8 {
|
|
block0(v0: i8, v1: i8):
|
|
v2 = ishl.i8 v0, v1
|
|
return v2
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rsi, %rcx
|
|
; andq %rcx, $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rsi, %rcx
|
|
; andq $7, %rcx
|
|
; movq %rdi, %rax
|
|
; shlb %cl, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i64_const(i64) -> i64 {
|
|
block0(v0: i64):
|
|
v1 = ishl_imm.i64 v0, 65
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; shlq $1, %rax, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; shlq $1, %rax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i32_const(i32) -> i32 {
|
|
block0(v0: i32):
|
|
v1 = ishl_imm.i32 v0, 33
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; shll $1, %eax, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; shll $1, %eax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i16_const(i16) -> i16 {
|
|
block0(v0: i16):
|
|
v1 = ishl_imm.i16 v0, 17
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; shlw $1, %ax, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; shlw $1, %ax
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|
|
function %ishl_i8_const(i8) -> i8 {
|
|
block0(v0: i8):
|
|
v1 = ishl_imm.i8 v0, 9
|
|
return v1
|
|
}
|
|
|
|
; VCode:
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block0:
|
|
; movq %rdi, %rax
|
|
; shlb $1, %al, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; ret
|
|
;
|
|
; Disassembled:
|
|
; block0: ; offset 0x0
|
|
; pushq %rbp
|
|
; movq %rsp, %rbp
|
|
; block1: ; offset 0x4
|
|
; movq %rdi, %rax
|
|
; shlb $1, %al
|
|
; movq %rbp, %rsp
|
|
; popq %rbp
|
|
; retq
|
|
|