8abfe928d6
* Rework the blockorder module to reuse the dom tree's cfg postorder * Update domtree tests * Treat br_table with an empty jump table as multiple block exits * Bless tests * Change branch_idx to succ_idx and fix the comment
79 lines
1.4 KiB
Plaintext
79 lines
1.4 KiB
Plaintext
test compile precise-output
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set unwind_info=false
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target aarch64
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function %f(i32) -> i32 {
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block0(v0: i32):
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br_table v0, block4, [block1, block2, block3]
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block1:
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v1 = iconst.i32 1
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jump block5(v1)
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block2:
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v2 = iconst.i32 2
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jump block5(v2)
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block3:
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v3 = iconst.i32 3
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jump block5(v3)
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block4:
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v4 = iconst.i32 4
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jump block5(v4)
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block5(v5: i32):
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v6 = iadd.i32 v0, v5
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return v6
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}
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; VCode:
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; block0:
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; emit_island 44
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; subs wzr, w0, #3
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; b.hs label4 ; csel x11, xzr, x0, hs ; csdb ; adr x10, pc+16 ; ldrsw x11, [x10, x11, uxtw #2] ; add x10, x10, x11 ; br x10 ; jt_entries [Label(MachLabel(3)), Label(MachLabel(2)), Label(MachLabel(1))]
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; block1:
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; movz w5, #3
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; b label5
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; block2:
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; movz w5, #2
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; b label5
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; block3:
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; movz w5, #1
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; b label5
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; block4:
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; movz w5, #4
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; b label5
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; block5:
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; add w0, w0, w5
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; ret
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;
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; Disassembled:
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; block0: ; offset 0x0
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; cmp w0, #3
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; b.hs #0x44
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; csel x11, xzr, x0, hs
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; csdb
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; adr x10, #0x20
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; ldrsw x11, [x10, w11, uxtw #2]
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; add x10, x10, x11
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; br x10
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; .byte 0x1c, 0x00, 0x00, 0x00
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; .byte 0x14, 0x00, 0x00, 0x00
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; .byte 0x0c, 0x00, 0x00, 0x00
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; block1: ; offset 0x2c
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; mov w5, #3
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; b #0x48
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; block2: ; offset 0x34
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; mov w5, #2
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; b #0x48
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; block3: ; offset 0x3c
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; mov w5, #1
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; b #0x48
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; block4: ; offset 0x44
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; mov w5, #4
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; block5: ; offset 0x48
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; add w0, w0, w5
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; ret
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