9ba9fd0f64
Without this special instruction, legalizing to the AVX512 instruction AND the SSE instruction sequence is impossible. This extra instruction would be rendered unnecessary by the x64 backend.
18 lines
744 B
Plaintext
18 lines
744 B
Plaintext
test binemit
|
|
set enable_simd
|
|
target x86_64 skylake has_avx512dq=true
|
|
|
|
function %imul_i64x2() {
|
|
block0:
|
|
[-, %xmm1] v0 = vconst.i64x2 [1 2]
|
|
[-, %xmm2] v1 = vconst.i64x2 [2 2]
|
|
[-, %xmm14] v2 = x86_pmullq v0, v1 ; bin: 62 72 f5 08 40 f2
|
|
; 62, mandatory EVEX prefix
|
|
; 72 = 0111 0010, R is set (MSB in %xmm14) while X, B, and R' are unset (note these are all inverted); mm is set to 0F38
|
|
; f5 = 1111 0101, W is set (64-bit op), vvvv set to 1 (inverted), bit 2 always set, pp set to 01
|
|
; 08 = 0000 1000, everything, LL' indicates 128-bit, V' is unset (inverted, %xmm1 has MSB of 0)
|
|
; 40, opcode (correct)
|
|
; f2 = 1111 0010, ModR/M byte using 0b110 from %xmm14 in reg and 0b010 from %xmm2 in r/m
|
|
return
|
|
}
|