53 lines
1.7 KiB
Rust
53 lines
1.7 KiB
Rust
use crate::cdsl::inst::InstructionGroup;
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use crate::cdsl::isa::TargetIsa;
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use crate::cdsl::regs::{IsaRegs, IsaRegsBuilder, RegBankBuilder, RegClassBuilder};
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use crate::cdsl::settings::{SettingGroup, SettingGroupBuilder};
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use crate::shared::Definitions as SharedDefinitions;
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fn define_settings(_shared: &SettingGroup) -> SettingGroup {
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let setting = SettingGroupBuilder::new("arm64");
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setting.finish()
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}
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fn define_registers() -> IsaRegs {
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let mut regs = IsaRegsBuilder::new();
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// The `x31` regunit serves as the stack pointer / zero register depending on context. We
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// reserve it and don't model the difference.
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let builder = RegBankBuilder::new("IntRegs", "x")
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.units(32)
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.track_pressure(true);
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let int_regs = regs.add_bank(builder);
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let builder = RegBankBuilder::new("FloatRegs", "v")
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.units(32)
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.track_pressure(true);
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let float_regs = regs.add_bank(builder);
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let builder = RegBankBuilder::new("FlagRegs", "")
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.units(1)
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.names(vec!["nzcv"])
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.track_pressure(false);
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let flag_reg = regs.add_bank(builder);
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let builder = RegClassBuilder::new_toplevel("GPR", int_regs);
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regs.add_class(builder);
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let builder = RegClassBuilder::new_toplevel("FPR", float_regs);
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regs.add_class(builder);
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let builder = RegClassBuilder::new_toplevel("FLAG", flag_reg);
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regs.add_class(builder);
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regs.finish()
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}
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pub fn define(shared_defs: &mut SharedDefinitions) -> TargetIsa {
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let settings = define_settings(&shared_defs.settings);
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let regs = define_registers();
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let inst_group = InstructionGroup::new("arm64", "arm64 specific instruction set");
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TargetIsa::new("arm64", inst_group, settings, regs)
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}
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