32a7593c94
Remove the boolean types from cranelift, and the associated instructions breduce, bextend, bconst, and bint. Standardize on using 1/0 for the return value from instructions that produce scalar boolean results, and -1/0 for boolean vector elements. Fixes #3205 Co-authored-by: Afonso Bordado <afonso360@users.noreply.github.com> Co-authored-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Co-authored-by: Chris Fallin <chris@cfallin.org>
99 lines
2.9 KiB
Plaintext
99 lines
2.9 KiB
Plaintext
test interpret
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test run
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target aarch64
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target x86_64
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target s390x
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target riscv64
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function %sqrt_f32(f32) -> f32 {
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block0(v0: f32):
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v1 = sqrt v0
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return v1
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}
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; run: %sqrt_f32(0x9.0) == 0x3.0
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; run: %sqrt_f32(0x0.0) == 0x0.0
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; run: %sqrt_f32(-0x0.0) == -0x0.0
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; run: %sqrt_f32(+Inf) == +Inf
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; F32 Epsilon / Max / Min Positive
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; run: %sqrt_f32(0x1.000000p-23) == 0x1.6a09e6p-12
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; run: %sqrt_f32(0x1.fffffep127) == 0x1.fffffep63
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; run: %sqrt_f32(0x1.000000p-126) == 0x1.000000p-63
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; F32 Subnormals
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; run: %sqrt_f32(0x0.800000p-126) == 0x1.6a09e6p-64
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; run: %sqrt_f32(0x0.000002p-126) == 0x1.6a09e6p-75
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; The IEEE754 Standard does not make a lot of guarantees about what
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; comes out of NaN producing operations, we just check if its a NaN
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function %sqrt_is_nan_f32(f32) -> i32 {
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block0(v0: f32):
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v2 = sqrt v0
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v3 = fcmp ne v2, v2
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v4 = uextend.i32 v3
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return v4
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}
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; run: %sqrt_is_nan_f32(-0x9.0) == 1
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; run: %sqrt_is_nan_f32(-Inf) == 1
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; run: %sqrt_is_nan_f32(+NaN) == 1
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; run: %sqrt_is_nan_f32(-NaN) == 1
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; run: %sqrt_is_nan_f32(+NaN:0x0) == 1
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; run: %sqrt_is_nan_f32(+NaN:0x1) == 1
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; run: %sqrt_is_nan_f32(+NaN:0x300001) == 1
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; run: %sqrt_is_nan_f32(-NaN:0x0) == 1
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; run: %sqrt_is_nan_f32(-NaN:0x1) == 1
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; run: %sqrt_is_nan_f32(-NaN:0x300001) == 1
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; run: %sqrt_is_nan_f32(+sNaN:0x1) == 1
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; run: %sqrt_is_nan_f32(-sNaN:0x1) == 1
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; run: %sqrt_is_nan_f32(+sNaN:0x200001) == 1
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; run: %sqrt_is_nan_f32(-sNaN:0x200001) == 1
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; run: %sqrt_is_nan_f32(-0x1.fffffep127) == 1
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function %sqrt_f64(f64) -> f64 {
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block0(v0: f64):
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v1 = sqrt v0
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return v1
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}
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; run: %sqrt_f64(0x9.0) == 0x3.0
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; run: %sqrt_f64(0x0.0) == 0x0.0
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; run: %sqrt_f64(-0x0.0) == -0x0.0
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; run: %sqrt_f64(+Inf) == +Inf
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; F64 Epsilon / Max / Min Positive
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; run: %sqrt_f64(0x1.0000000000000p-52) == 0x1.0000000000000p-26
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; run: %sqrt_f64(0x1.fffffffffffffp1023) == 0x1.fffffffffffffp511
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; run: %sqrt_f64(0x1.0000000000000p-1022) == 0x1.0000000000000p-511
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; F64 Subnormals
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; run: %sqrt_f64(0x0.8000000000000p-1022) == 0x1.6a09e667f3bcdp-512
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; run: %sqrt_f64(0x0.0000000000001p-1022) == 0x1.0000000000000p-537
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; The IEEE754 Standard does not make a lot of guarantees about what
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; comes out of NaN producing operations, we just check if its a NaN
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function %sqrt_is_nan_f64(f64) -> i32 {
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block0(v0: f64):
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v2 = sqrt v0
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v3 = fcmp ne v2, v2
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v4 = uextend.i32 v3
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return v4
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}
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; run: %sqrt_is_nan_f64(-0x9.0) == 1
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; run: %sqrt_is_nan_f64(-Inf) == 1
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; run: %sqrt_is_nan_f64(+NaN) == 1
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; run: %sqrt_is_nan_f64(-NaN) == 1
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; run: %sqrt_is_nan_f64(+NaN:0x0) == 1
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; run: %sqrt_is_nan_f64(+NaN:0x1) == 1
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; run: %sqrt_is_nan_f64(+NaN:0x4000000000001) == 1
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; run: %sqrt_is_nan_f64(-NaN:0x0) == 1
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; run: %sqrt_is_nan_f64(-NaN:0x1) == 1
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; run: %sqrt_is_nan_f64(-NaN:0x4000000000001) == 1
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; run: %sqrt_is_nan_f64(+sNaN:0x1) == 1
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; run: %sqrt_is_nan_f64(-sNaN:0x1) == 1
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; run: %sqrt_is_nan_f64(+sNaN:0x4000000000001) == 1
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; run: %sqrt_is_nan_f64(-sNaN:0x4000000000001) == 1
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; run: %sqrt_is_nan_f64(-0x1.fffffffffffffp1023) == 1
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