961107ec63
- Allow bitcast for vectors with differing lane widths - Remove raw_bitcast IR instruction - Change all users of raw_bitcast to bitcast - Implement support for no-op bitcast cases across backends This implements the second step of the plan outlined here: https://github.com/bytecodealliance/wasmtime/issues/4566#issuecomment-1234819394
36 lines
1000 B
Plaintext
36 lines
1000 B
Plaintext
test interpret
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test run
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target aarch64
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target x86_64
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target s390x
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function %bitcast_if32x4(i32x4) -> f32x4 {
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block0(v0: i32x4):
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v1 = bitcast.f32x4 v0
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return v1
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}
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; run: %bitcast_if32x4([0 4294967295 -1 127]) == [0x0.0 -NaN:0x3fffff -NaN:0x3fffff 0x0.0000fep-126]
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function %bitcast_fi32x4(f32x4) -> i32x4 {
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block0(v0: f32x4):
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v1 = bitcast.i32x4 v0
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return v1
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}
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; run: %bitcast_fi32x4([0x0.0 -NaN:0x3fffff -NaN:0x3fffff 0x0.0000fep-126]) == [0 4294967295 -1 127]
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function %bitcast_if64x2(i64x2) -> f64x2 {
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block0(v0: i64x2):
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v1 = bitcast.f64x2 v0
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return v1
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}
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; run: %bitcast_if64x2([0 18446744073709551615]) == [0x0.0 -NaN:0x7ffffffffffff]
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; run: %bitcast_if64x2([-1 127]) == [-NaN:0x7ffffffffffff 0x0.000000000007fp-1022]
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function %bitcast_fi64x2(f64x2) -> i64x2 {
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block0(v0: f64x2):
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v1 = bitcast.i64x2 v0
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return v1
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}
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; run: %bitcast_fi64x2([0x0.0 -NaN:0x7ffffffffffff]) == [0 18446744073709551615]
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; run: %bitcast_fi64x2([-NaN:0x7ffffffffffff 0x0.000000000007fp-1022]) == [-1 127]
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