Chris Fallin 6eea015d6c Multi-register value support: framework for Values wider than machine regs. ...

This will allow for support for `I128` values everywhere, and `I64`
values on 32-bit targets (e.g., ARM32 and x86-32). It does not alter the
machine backends to build such support; it just adds the framework for
the MachInst backends to *reason* about a `Value` residing in more than
one register.

2021-01-05 17:45:02 -08:00

..

abi_impl.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

abi.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

adapter.rs

machinst aarch64: New backend unwind (#2313)

2020-11-06 08:02:45 -06:00

blockorder.rs

Address review comments.

2020-05-18 16:25:26 -07:00

buffer.rs

Debug info: two fixes in x64 backend.

2020-12-02 10:41:14 -08:00

compile.rs

machinst: allow passing constant information to the instruction emitter;

2020-10-08 09:21:51 +02:00

helpers.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

inst_common.rs

AArch64 SIMD: pattern-match load+splat into LD1R instruction.

2020-11-16 15:59:28 -08:00

lower.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

mod.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

valueregs.rs

Multi-register value support: framework for Values wider than machine regs.

2021-01-05 17:45:02 -08:00

vcode.rs

Remove size-of-struct asserts that break with some Rust versions.

2020-11-11 17:13:28 -08:00